MEGA65: make CPU "clock-cycles per opcode" emulation more precise

[lgblgblgb]

Currently, most of opcode execution assumes that clock cycles/opcode is always the same as with C65, which is: some given number for "fast" (C65-fast, 3.5MHz) and "slow" (C64-kind-of) timing, but that's all. However there is serious discrepancy here:

• At 40MHz mode, on MEGA65, some opcodes need additional cycle (cycles??)
• 32-bit addressing opcodes should take account the fetch for the "BP pointer" which is currently not in Xemu!
• maybe, 32 bit data ("Q") opcodes takes more time to execute (even not counting the time needed for the "prefixes" which is already emulated by Xemu that those take time)
• probably in all "modes"/opcodes where it applies: conditional opcodes (ie sometimes needs more - or less?? - time, depending on things like branch is taken or not, and similar cases) does not take account the proper result

Because these factors are largely ignored currently by Xemu, Xemu seems to be too fast in many cases compared to a real MEGA65. Also please note that even with C65-stuff only at 3.5MHz, it must be checked, that all opcodes are OK from this cycles respect!

All of these, result in complains that Xemu seems to be faster in certain cases than a real MEGA65, especially noticeable when people do benchmarks on MEGA65 but having only the emulator to test with, which is later compared to the real thing, causing surprises.

For the 32-bit stuff though, first many missing opcodes needs to be emulated at all ... See: #202