.gitignore

.vscode/

### Vivado ###
#########################################################################################################
##	This is an example .gitignore file for Vivado, please treat it as an example as
##	it might not be complete. In addition, XAPP 1165 should be followed.
#########
#Exclude all
*
!*/
*.runs/
*.hw/
*.sim/
*.tmp/
*.cache/
*.Xil/
*.ip_user_files/
!**/.gitignore
!**/.gitattributes
!**/.gitmodules
!*.md

###########################################################################
##	VIVADO
#Source files:
#Do NOT ignore VHDL, Verilog, block diagrams or EDIF files.
!*.vhd
!*.v
!*.vh
!*.sv
!*.svh
!*.bd
!*.edif
#IP files
!*.xml
#.xci: synthesis and implemented not possible - you need to return back to the previous version to generate output products
#.xci + .dcp: implementation possible but not re-synthesis
#*.xci(www.spiritconsortium.org)
!*.xci
#.xcix: Core container file
#.xcix: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_2/ug896-vivado-ip.pdf (Page 41)
!*.xcix
#*.dcp(checkpoint files)
!*.dcp
!*.vds
!*.pb
#All bd comments and layout coordinates are stored within .ui
!*.ui
!*.ooc
#System Generator
!*.mdl
!*.slx
!*.bxml
#Simulation logic analyzer
!*.wcfg
!*.coe
#MIG
!*.prj
!*.mem
#Project files
#XPR  +  *.XML ? XPR (Files are merged into a single XPR file for 2014.1 version)
#Do NOT ignore *.xpr files
!*.xpr
#Constraint files
#Do NOT ignore *.xdc files
!*.xdc
#TCL - files
!*.tcl
#Reports
!*.rpt
!*.txt
!*.vdi
#C-files
!*.c
!*.h
!*.elf
!*.bmm
!*.xmp

# End of https://www.gitignore.io/api/vivado
!design-doc.pdf