From 9c679a13c00ea4c6c918104ca19fbbb362533ba8 Mon Sep 17 00:00:00 2001 From: ankolesn Date: Sun, 1 Dec 2024 17:39:30 +0300 Subject: [PATCH] Add support CaseStatementCondition::Inside --- lib/Conversion/ImportVerilog/Statements.cpp | 28 +++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/lib/Conversion/ImportVerilog/Statements.cpp b/lib/Conversion/ImportVerilog/Statements.cpp index fe1bc80f5d2c..f2069f9bb8eb 100644 --- a/lib/Conversion/ImportVerilog/Statements.cpp +++ b/lib/Conversion/ImportVerilog/Statements.cpp @@ -208,8 +208,32 @@ struct StmtVisitor { cond = builder.create(itemLoc, caseExpr, value); break; case CaseStatementCondition::Inside: - mlir::emitError(loc, "unsupported set membership case statement"); - return failure(); + std::vector values; + values.reserve(item.expressions.size()); + for (const auto *expr : item.expressions) { + auto value = context.convertRvalueExpression(*expr); + if (!value) + return failure(); + values.push_back(value); + } + + if (values.empty()) { + mlir::emitError(loc, "empty set in inside case statement"); + return failure(); + } + + if (values.size() == 1) { + cond = builder.create( + loc, caseExpr, values.front()); + } else { + cond = builder.create(loc, caseExpr, values[0]); + for (size_t i = 1; i < values.size(); ++i) { + auto nextCond = builder.create( + loc, caseExpr, values[i]); + cond = builder.create(loc, builder.getI1Type(), cond, + nextCond); + } + } } cond = builder.create(itemLoc, builder.getI1Type(), cond);