diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index aa1a9d7be9cc..8f01ef6f2c79 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -735,8 +735,99 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
   case X86::BI__builtin_ia32_scattersiv4sf:
   case X86::BI__builtin_ia32_scattersiv4si:
   case X86::BI__builtin_ia32_scattersiv8sf:
-  case X86::BI__builtin_ia32_scattersiv8si:
-    llvm_unreachable("scattersiv8df NYI");
+  case X86::BI__builtin_ia32_scattersiv8si: {
+
+    llvm::StringRef intrinsicName;
+
+    switch (BuiltinID) {
+    default:
+      llvm_unreachable("Unexpected builtin");
+    case X86::BI__builtin_ia32_scattersiv8df:
+      intrinsicName = "x86.avx512.mask.scatter.dpd.512";
+      break;
+    case X86::BI__builtin_ia32_scattersiv16sf:
+      intrinsicName = "x86.avx512.mask.scatter.dps.512";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv8df:
+      intrinsicName = "x86.avx512.mask.scatter.qpd.512";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv16sf:
+      intrinsicName = "x86.avx512.mask.scatter.qps.512";
+      break;
+    case X86::BI__builtin_ia32_scattersiv8di:
+      intrinsicName = "x86.avx512.mask.scatter.dpq.512";
+      break;
+    case X86::BI__builtin_ia32_scattersiv16si:
+      intrinsicName = "x86.avx512.mask.scatter.dpi.512";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv8di:
+      intrinsicName = "x86.avx512.mask.scatter.qpq.512";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv16si:
+      intrinsicName = "x86.avx512.mask.scatter.qpi.512";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv2df:
+      intrinsicName = "x86.avx512.mask.scatterdiv2.df";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv2di:
+      intrinsicName = "x86.avx512.mask.scatterdiv2.di";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv4df:
+      intrinsicName = "x86.avx512.mask.scatterdiv4.df";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv4di:
+      intrinsicName = "x86.avx512.mask.scatterdiv4.di";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv4sf:
+      intrinsicName = "x86.avx512.mask.scatterdiv4.sf";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv4si:
+      intrinsicName = "x86.avx512.mask.scatterdiv4.si";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv8sf:
+      intrinsicName = "x86.avx512.mask.scatterdiv8.sf";
+      break;
+    case X86::BI__builtin_ia32_scatterdiv8si:
+      intrinsicName = "x86.avx512.mask.scatterdiv8.si";
+      break;
+    case X86::BI__builtin_ia32_scattersiv2df:
+      intrinsicName = "x86.avx512.mask.scattersiv2.df";
+      break;
+    case X86::BI__builtin_ia32_scattersiv2di:
+      intrinsicName = "x86.avx512.mask.scattersiv2.di";
+      break;
+    case X86::BI__builtin_ia32_scattersiv4df:
+      intrinsicName = "x86.avx512.mask.scattersiv4.df";
+      break;
+    case X86::BI__builtin_ia32_scattersiv4di:
+      intrinsicName = "x86.avx512.mask.scattersiv4.di";
+      break;
+    case X86::BI__builtin_ia32_scattersiv4sf:
+      intrinsicName = "x86.avx512.mask.scattersiv4.sf";
+      break;
+    case X86::BI__builtin_ia32_scattersiv4si:
+      intrinsicName = "x86.avx512.mask.scattersiv4.si";
+      break;
+    case X86::BI__builtin_ia32_scattersiv8sf:
+      intrinsicName = "x86.avx512.mask.scattersiv8.sf";
+      break;
+    case X86::BI__builtin_ia32_scattersiv8si:
+      intrinsicName = "x86.avx512.mask.scattersiv8.si";
+      break;
+    }
+
+    unsigned minElts =
+        std::min(cast<cir::VectorType>(Ops[2].getType()).getSize(),
+                 cast<cir::VectorType>(Ops[3].getType()).getSize());
+    Ops[1] = getMaskVecValue(*this, Ops[1], minElts, getLoc(E->getExprLoc()));
+
+    return builder
+        .create<cir::LLVMIntrinsicCallOp>(
+            getLoc(E->getExprLoc()), builder.getStringAttr(intrinsicName.str()),
+            builder.getVoidTy(), Ops)
+        .getResult();
+  }
+
   case X86::BI__builtin_ia32_vextractf128_pd256:
   case X86::BI__builtin_ia32_vextractf128_ps256:
   case X86::BI__builtin_ia32_vextractf128_si256:
diff --git a/clang/test/CIR/CodeGen/X86/avx512f-builtins.c b/clang/test/CIR/CodeGen/X86/avx512f-builtins.c
index e2c37dd47a99..a902d568dbe0 100644
--- a/clang/test/CIR/CodeGen/X86/avx512f-builtins.c
+++ b/clang/test/CIR/CodeGen/X86/avx512f-builtins.c
@@ -337,3 +337,128 @@ __m512i test_mm512_maskz_expandloadu_epi32(__mmask16 __U, void const *__P) {
   // LLVM: @llvm.masked.expandload.v16i32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}})
   return _mm512_maskz_expandloadu_epi32(__U, __P); 
 }
+void test_mm512_i32scatter_pd(void *__addr, __m256i __index, __m512d __v1) {
+  // CIR-LABEL: test_mm512_i32scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.dpd.512"
+
+  // LLVM-LABEL: test_mm512_i32scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatter.dpd.512
+  return _mm512_i32scatter_pd(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i32scatter_pd(void *__addr, __mmask8 __mask, __m256i __index, __m512d __v1) {
+  // CIR-LABEL: test_mm512_mask_i32scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.dpd.512"
+
+  // LLVM-LABEL: test_mm512_mask_i32scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatter.dpd.512
+  return _mm512_mask_i32scatter_pd(__addr, __mask, __index, __v1, 2); 
+}
+
+void test_mm512_i32scatter_ps(void *__addr, __m512i __index, __m512 __v1) {
+  // CIR-LABEL: test_mm512_i32scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.dps.512"
+
+  // LLVM-LABEL: test_mm512_i32scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatter.dps.512
+  return _mm512_i32scatter_ps(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i32scatter_ps(void *__addr, __mmask16 __mask, __m512i __index, __m512 __v1) {
+  // CIR-LABEL: test_mm512_mask_i32scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.dps.512"
+
+  // LLVM-LABEL: test_mm512_mask_i32scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatter.dps.512
+  return _mm512_mask_i32scatter_ps(__addr, __mask, __index, __v1, 2); 
+}
+
+void test_mm512_i64scatter_pd(void *__addr, __m512i __index, __m512d __v1) {
+  // CIR-LABEL: test_mm512_i64scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qpd.512"
+
+  // LLVM-LABEL: test_mm512_i64scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatter.qpd.512
+  return _mm512_i64scatter_pd(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i64scatter_pd(void *__addr, __mmask8 __mask, __m512i __index, __m512d __v1) {
+  // CIR-LABEL: test_mm512_mask_i64scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qpd.512"
+
+  // LLVM-LABEL: test_mm512_mask_i64scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatter.qpd.512
+  return _mm512_mask_i64scatter_pd(__addr, __mask, __index, __v1, 2); 
+}
+
+void test_mm512_i64scatter_ps(void *__addr, __m512i __index, __m256 __v1) {
+  // CIR-LABEL: test_mm512_i64scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qps.512"
+
+  // LLVM-LABEL: test_mm512_i64scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatter.qps.512
+  return _mm512_i64scatter_ps(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i64scatter_ps(void *__addr, __mmask8 __mask, __m512i __index, __m256 __v1) {
+  // CIR-LABEL: test_mm512_mask_i64scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qps.512"
+
+  // LLVM-LABEL: test_mm512_mask_i64scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatter.qps.512
+  return _mm512_mask_i64scatter_ps(__addr, __mask, __index, __v1, 2); 
+}
+
+void test_mm512_i32scatter_epi32(void *__addr, __m512i __index, __m512i __v1) {
+  // CIR-LABEL: test_mm512_i32scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.dpi.512"
+
+  // LLVM-LABEL: test_mm512_i32scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatter.dpi.512
+  return _mm512_i32scatter_epi32(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i32scatter_epi32(void *__addr, __mmask16 __mask, __m512i __index, __m512i __v1) {
+  // CIR-LABEL: test_mm512_mask_i32scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.dpi.512"
+
+  // LLVM-LABEL: test_mm512_mask_i32scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatter.dpi.512
+  return _mm512_mask_i32scatter_epi32(__addr, __mask, __index, __v1, 2); 
+}
+
+void test_mm512_i64scatter_epi64(void *__addr, __m512i __index, __m512i __v1) {
+  // CIR-LABEL: test_mm512_i64scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qpq.512"
+
+  // LLVM-LABEL: test_mm512_i64scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scatter.qpq.512
+  return _mm512_i64scatter_epi64(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i64scatter_epi64(void *__addr, __mmask8 __mask, __m512i __index, __m512i __v1) {
+  // CIR-LABEL: test_mm512_mask_i64scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qpq.512"
+
+  // LLVM-LABEL: test_mm512_mask_i64scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scatter.qpq.512
+  return _mm512_mask_i64scatter_epi64(__addr, __mask, __index, __v1, 2); 
+}
+
+void test_mm512_i64scatter_epi32(void *__addr, __m512i __index, __m256i __v1) {
+  // CIR-LABEL: test_mm512_i64scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qpi.512"
+
+  // LLVM-LABEL: test_mm512_i64scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatter.qpi.512
+  return _mm512_i64scatter_epi32(__addr, __index, __v1, 2); 
+}
+
+void test_mm512_mask_i64scatter_epi32(void *__addr, __mmask8 __mask, __m512i __index, __m256i __v1) {
+  // CIR-LABEL: test_mm512_mask_i64scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatter.qpi.512"
+
+  // LLVM-LABEL: test_mm512_mask_i64scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatter.qpi.512
+  return _mm512_mask_i64scatter_epi32(__addr, __mask, __index, __v1, 2); 
+}
diff --git a/clang/test/CIR/CodeGen/X86/avx512vl-builtins.c b/clang/test/CIR/CodeGen/X86/avx512vl-builtins.c
index 10cf8a48b113..a8f81cb5563c 100644
--- a/clang/test/CIR/CodeGen/X86/avx512vl-builtins.c
+++ b/clang/test/CIR/CodeGen/X86/avx512vl-builtins.c
@@ -527,3 +527,290 @@ __m256i test_mm256_maskz_expandloadu_epi32(__mmask8 __U, void const *__P) {
   // LLVM: @llvm.masked.expandload.v8i32(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i32> %{{.*}})
   return _mm256_maskz_expandloadu_epi32(__U,__P);
 }
+void test_mm_i64scatter_pd(double *__addr, __m128i __index,  __m128d __v1) {
+  // CIR-LABEL: test_mm_i64scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv2.df"
+
+  // LLVM-LABEL: @test_mm_i64scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv2.df
+  return _mm_i64scatter_pd(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i64scatter_pd(double *__addr, __mmask8 __mask, __m128i __index, __m128d __v1) {
+  // CIR-LABEL: test_mm_mask_i64scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv2.df"
+
+  // LLVM-LABEL: @test_mm_mask_i64scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv2.df
+  return _mm_mask_i64scatter_pd(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i64scatter_epi64(long long *__addr, __m128i __index,  __m128i __v1) {
+  // CIR-LABEL: test_mm_i64scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv2.di"
+
+  // LLVM-LABEL: @test_mm_i64scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv2.di
+  return _mm_i64scatter_epi64(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i64scatter_epi64(long long *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) {
+  // CIR-LABEL: test_mm_mask_i64scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv2.di"
+
+  // LLVM-LABEL: @test_mm_mask_i64scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv2.di
+  return _mm_mask_i64scatter_epi64(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i64scatter_pd(double *__addr, __m256i __index,  __m256d __v1) {
+  // CIR-LABEL: test_mm256_i64scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.df"
+
+  // LLVM-LABEL: @test_mm256_i64scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.df
+  return _mm256_i64scatter_pd(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i64scatter_pd(double *__addr, __mmask8 __mask, __m256i __index, __m256d __v1) {
+  // CIR-LABEL: test_mm256_mask_i64scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.df"
+
+  // LLVM-LABEL: @test_mm256_mask_i64scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.df
+  return _mm256_mask_i64scatter_pd(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i64scatter_epi64(long long *__addr, __m256i __index,  __m256i __v1) {
+  // CIR-LABEL: test_mm256_i64scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.di"
+
+  // LLVM-LABEL: @test_mm256_i64scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.di
+  return _mm256_i64scatter_epi64(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i64scatter_epi64(long long *__addr, __mmask8 __mask,  __m256i __index, __m256i __v1) {
+  // CIR-LABEL: test_mm256_mask_i64scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.di"
+
+  // LLVM-LABEL: @test_mm256_mask_i64scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.di
+  return _mm256_mask_i64scatter_epi64(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i64scatter_ps(float *__addr, __m128i __index, __m128 __v1) {
+  // CIR-LABEL: test_mm_i64scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.sf"
+
+  // LLVM-LABEL: @test_mm_i64scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.sf
+  return _mm_i64scatter_ps(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i64scatter_ps(float *__addr, __mmask8 __mask, __m128i __index, __m128 __v1) {
+  // CIR-LABEL: test_mm_mask_i64scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.sf"
+
+  // LLVM-LABEL: @test_mm_mask_i64scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.sf
+  return _mm_mask_i64scatter_ps(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i64scatter_epi32(int *__addr, __m128i __index,  __m128i __v1) {
+  // CIR-LABEL: test_mm_i64scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.si"
+
+  // LLVM-LABEL: @test_mm_i64scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.si
+  return _mm_i64scatter_epi32(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i64scatter_epi32(int *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) {
+  // CIR-LABEL: test_mm_mask_i64scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv4.si"
+
+  // LLVM-LABEL: @test_mm_mask_i64scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv4.si
+  return _mm_mask_i64scatter_epi32(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i64scatter_ps(float *__addr, __m256i __index,  __m128 __v1) {
+  // CIR-LABEL: test_mm256_i64scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv8.sf"
+
+  // LLVM-LABEL: @test_mm256_i64scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv8.sf
+  return _mm256_i64scatter_ps(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i64scatter_ps(float *__addr, __mmask8 __mask, __m256i __index, __m128 __v1) {
+  // CIR-LABEL: test_mm256_mask_i64scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv8.sf"
+
+  // LLVM-LABEL: @test_mm256_mask_i64scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv8.sf
+  return _mm256_mask_i64scatter_ps(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i64scatter_epi32(int *__addr, __m256i __index,  __m128i __v1) {
+  // CIR-LABEL: test_mm256_i64scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv8.si"
+
+  // LLVM-LABEL: @test_mm256_i64scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv8.si
+  return _mm256_i64scatter_epi32(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i64scatter_epi32(int *__addr, __mmask8 __mask,  __m256i __index, __m128i __v1) {
+  // CIR-LABEL: test_mm256_mask_i64scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scatterdiv8.si"
+
+  // LLVM-LABEL: @test_mm256_mask_i64scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scatterdiv8.si
+  return _mm256_mask_i64scatter_epi32(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i32scatter_pd(double *__addr, __m128i __index,  __m128d __v1) {
+  // CIR-LABEL: test_mm_i32scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv2.df"
+
+  // LLVM-LABEL: @test_mm_i32scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scattersiv2.df
+  return _mm_i32scatter_pd(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i32scatter_pd(double *__addr, __mmask8 __mask, __m128i __index, __m128d __v1) {
+  // CIR-LABEL: test_mm_mask_i32scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv2.df"
+
+  // LLVM-LABEL: @test_mm_mask_i32scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scattersiv2.df
+  return _mm_mask_i32scatter_pd(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i32scatter_epi64(long long *__addr, __m128i __index,  __m128i __v1) {
+  // CIR-LABEL: test_mm_i32scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv2.di"
+
+  // LLVM-LABEL: @test_mm_i32scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scattersiv2.di
+  return _mm_i32scatter_epi64(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i32scatter_epi64(long long *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) {
+  // CIR-LABEL: test_mm_mask_i32scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv2.di"
+
+  // LLVM-LABEL: @test_mm_mask_i32scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scattersiv2.di
+  return _mm_mask_i32scatter_epi64(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i32scatter_pd(double *__addr, __m128i __index,  __m256d __v1) {
+  // CIR-LABEL: test_mm256_i32scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.df"
+
+  // LLVM-LABEL: @test_mm256_i32scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.df
+  return _mm256_i32scatter_pd(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i32scatter_pd(double *__addr, __mmask8 __mask, __m128i __index, __m256d __v1) {
+  // CIR-LABEL: test_mm256_mask_i32scatter_pd
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.df"
+
+  // LLVM-LABEL: @test_mm256_mask_i32scatter_pd
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.df
+  return _mm256_mask_i32scatter_pd(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i32scatter_epi64(long long *__addr, __m128i __index,  __m256i __v1) {
+  // CIR-LABEL: test_mm256_i32scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.di"
+
+  // LLVM-LABEL: @test_mm256_i32scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.di
+  return _mm256_i32scatter_epi64(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i32scatter_epi64(long long *__addr, __mmask8 __mask,  __m128i __index, __m256i __v1) {
+  // CIR-LABEL: test_mm256_mask_i32scatter_epi64
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.di"
+
+  // LLVM-LABEL: @test_mm256_mask_i32scatter_epi64
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.di
+  return _mm256_mask_i32scatter_epi64(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i32scatter_ps(float *__addr, __m128i __index, __m128 __v1) {
+  // CIR-LABEL: test_mm_i32scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.sf"
+
+  // LLVM-LABEL: @test_mm_i32scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.sf
+  return _mm_i32scatter_ps(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i32scatter_ps(float *__addr, __mmask8 __mask, __m128i __index, __m128 __v1) {
+  // CIR-LABEL: test_mm_mask_i32scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.sf"
+
+  // LLVM-LABEL: @test_mm_mask_i32scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.sf
+  return _mm_mask_i32scatter_ps(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm_i32scatter_epi32(int *__addr, __m128i __index,  __m128i __v1) {
+  // CIR-LABEL: test_mm_i32scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.si"
+
+  // LLVM-LABEL: @test_mm_i32scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.si
+  return _mm_i32scatter_epi32(__addr,__index,__v1,2); 
+}
+
+void test_mm_mask_i32scatter_epi32(int *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) {
+  // CIR-LABEL: test_mm_mask_i32scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv4.si"
+
+  // LLVM-LABEL: @test_mm_mask_i32scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scattersiv4.si
+  return _mm_mask_i32scatter_epi32(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i32scatter_ps(float *__addr, __m256i __index,  __m256 __v1) {
+  // CIR-LABEL: test_mm256_i32scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv8.sf"
+
+  // LLVM-LABEL: @test_mm256_i32scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scattersiv8.sf
+  return _mm256_i32scatter_ps(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i32scatter_ps(float *__addr, __mmask8 __mask, __m256i __index, __m256 __v1) {
+  // CIR-LABEL: test_mm256_mask_i32scatter_ps
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv8.sf"
+
+  // LLVM-LABEL: @test_mm256_mask_i32scatter_ps
+  // LLVM: @llvm.x86.avx512.mask.scattersiv8.sf
+  return _mm256_mask_i32scatter_ps(__addr,__mask,__index,__v1,2); 
+}
+
+void test_mm256_i32scatter_epi32(int *__addr, __m256i __index,  __m256i __v1) {
+  // CIR-LABEL: test_mm256_i32scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv8.si"
+
+  // LLVM-LABEL: @test_mm256_i32scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scattersiv8.si
+  return _mm256_i32scatter_epi32(__addr,__index,__v1,2); 
+}
+
+void test_mm256_mask_i32scatter_epi32(int *__addr, __mmask8 __mask,  __m256i __index, __m256i __v1) {
+  // CIR-LABEL: test_mm256_mask_i32scatter_epi32
+  // CIR: cir.llvm.intrinsic "x86.avx512.mask.scattersiv8.si"
+
+  // LLVM-LABEL: @test_mm256_mask_i32scatter_epi32
+  // LLVM: @llvm.x86.avx512.mask.scattersiv8.si
+  return _mm256_mask_i32scatter_epi32(__addr,__mask,__index,__v1,2); 
+}