|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -S -passes=instcombine < %s | FileCheck %s |
| 3 | + |
| 4 | +; (select (icmp x, 0, eq), 0, (umin x, y)) -> (umin x, y) |
| 5 | +define i64 @umin_select(i64 %a, i64 %b) { |
| 6 | +; CHECK-LABEL: @umin_select( |
| 7 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 8 | +; CHECK-NEXT: [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[A:%.*]], i64 [[B_FR]]) |
| 9 | +; CHECK-NEXT: ret i64 [[UMIN]] |
| 10 | +; |
| 11 | + %cond = icmp eq i64 %a, 0 |
| 12 | + %umin = call i64 @llvm.umin.i64(i64 %a, i64 %b) |
| 13 | + %select = select i1 %cond, i64 0, i64 %umin |
| 14 | + ret i64 %select |
| 15 | +} |
| 16 | + |
| 17 | +; (select (icmp x, 0, eq), 0, (mul x, y)) -> (mul x, y) |
| 18 | +define i64 @mul_select(i64 %a, i64 %b) { |
| 19 | +; CHECK-LABEL: @mul_select( |
| 20 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 21 | +; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B_FR]] |
| 22 | +; CHECK-NEXT: ret i64 [[MUL]] |
| 23 | +; |
| 24 | + %cond = icmp eq i64 %a, 0 |
| 25 | + %mul = mul i64 %a, %b |
| 26 | + %select = select i1 %cond, i64 0, i64 %mul |
| 27 | + ret i64 %select |
| 28 | +} |
| 29 | + |
| 30 | +; (select (icmp x, 0, eq), 0, (mul x, y)) -> (mul x, y) |
| 31 | +define i64 @mul_select_comm(i64 %a, i64 %b) { |
| 32 | +; CHECK-LABEL: @mul_select_comm( |
| 33 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 34 | +; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[B_FR]], [[A:%.*]] |
| 35 | +; CHECK-NEXT: ret i64 [[MUL]] |
| 36 | +; |
| 37 | + %cond = icmp eq i64 %a, 0 |
| 38 | + %mul = mul i64 %b, %a |
| 39 | + %select = select i1 %cond, i64 0, i64 %mul |
| 40 | + ret i64 %select |
| 41 | +} |
| 42 | + |
| 43 | +; (select (icmp x, 0, eq), 0, (shl x, y)) -> (shl x, y) |
| 44 | +define i64 @shl_select(i64 %a, i64 %b) { |
| 45 | +; CHECK-LABEL: @shl_select( |
| 46 | +; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0 |
| 47 | +; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A]], [[B_FR:%.*]] |
| 48 | +; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[SHL]] |
| 49 | +; CHECK-NEXT: ret i64 [[SELECT]] |
| 50 | +; |
| 51 | + %cond = icmp eq i64 %a, 0 |
| 52 | + %shl = shl i64 %a, %b |
| 53 | + %select = select i1 %cond, i64 0, i64 %shl |
| 54 | + ret i64 %select |
| 55 | +} |
| 56 | + |
| 57 | +; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y) |
| 58 | +define i64 @and_select(i64 %a, i64 %b) { |
| 59 | +; CHECK-LABEL: @and_select( |
| 60 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 61 | +; CHECK-NEXT: [[AND:%.*]] = and i64 [[A:%.*]], [[B_FR]] |
| 62 | +; CHECK-NEXT: ret i64 [[AND]] |
| 63 | +; |
| 64 | + %cond = icmp eq i64 %a, 0 |
| 65 | + %and = and i64 %a, %b |
| 66 | + %select = select i1 %cond, i64 0, i64 %and |
| 67 | + ret i64 %select |
| 68 | +} |
| 69 | + |
| 70 | +; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y) |
| 71 | +define i64 @and_select_comm(i64 %a, i64 %b) { |
| 72 | +; CHECK-LABEL: @and_select_comm( |
| 73 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 74 | +; CHECK-NEXT: [[AND:%.*]] = and i64 [[B_FR]], [[A:%.*]] |
| 75 | +; CHECK-NEXT: ret i64 [[AND]] |
| 76 | +; |
| 77 | + %cond = icmp eq i64 %a, 0 |
| 78 | + %and = and i64 %b, %a |
| 79 | + %select = select i1 %cond, i64 0, i64 %and |
| 80 | + ret i64 %select |
| 81 | +} |
| 82 | + |
| 83 | +; (select (icmp x, 0, ne), (ashr x, y), 0) -> (ashr x, y) |
| 84 | +define i64 @ashr_select(i64 %a, i64 %b) { |
| 85 | +; CHECK-LABEL: @ashr_select( |
| 86 | +; CHECK-NEXT: [[COND_NOT:%.*]] = icmp eq i64 [[A:%.*]], 0 |
| 87 | +; CHECK-NEXT: [[ASHR:%.*]] = ashr i64 [[A]], [[B_FR:%.*]] |
| 88 | +; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND_NOT]], i64 0, i64 [[ASHR]] |
| 89 | +; CHECK-NEXT: ret i64 [[SELECT]] |
| 90 | +; |
| 91 | + %cond = icmp ne i64 0, %a |
| 92 | + %ashr = ashr i64 %a, %b |
| 93 | + %select = select i1 %cond, i64 %ashr, i64 0 |
| 94 | + ret i64 %select |
| 95 | +} |
| 96 | + |
| 97 | +; (select (icmp x, 0, ne), (lshr x, y), 0) -> (lshr x, y) |
| 98 | +define i64 @lshr_select(i64 %a, i64 %b) { |
| 99 | +; CHECK-LABEL: @lshr_select( |
| 100 | +; CHECK-NEXT: [[COND_NOT:%.*]] = icmp eq i64 [[A:%.*]], 0 |
| 101 | +; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[A]], [[B_FR:%.*]] |
| 102 | +; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND_NOT]], i64 0, i64 [[LSHR]] |
| 103 | +; CHECK-NEXT: ret i64 [[SELECT]] |
| 104 | +; |
| 105 | + %cond = icmp ne i64 0, %a |
| 106 | + %lshr = lshr i64 %a, %b |
| 107 | + %select = select i1 %cond, i64 %lshr, i64 0 |
| 108 | + ret i64 %select |
| 109 | +} |
| 110 | + |
| 111 | +; (select (icmp x, 0, eq), 0, fshr(x, x, y)) -> fshr(x, x, y) |
| 112 | +define i64 @fshr_select(i64 %a, i64 %b) { |
| 113 | +; CHECK-LABEL: @fshr_select( |
| 114 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 115 | +; CHECK-NEXT: [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]]) |
| 116 | +; CHECK-NEXT: ret i64 [[FSHR]] |
| 117 | +; |
| 118 | + %cond = icmp eq i64 %a, 0 |
| 119 | + %fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %a, i64 %b) |
| 120 | + %select = select i1 %cond, i64 0, i64 %fshr |
| 121 | + ret i64 %select |
| 122 | +} |
| 123 | + |
| 124 | +; (select (icmp x, 0, eq), 0, (fshl x, x, y)) -> (fshl x, x, y) |
| 125 | +define i64 @fshl_select(i64 %a, i64 %b) { |
| 126 | +; CHECK-LABEL: @fshl_select( |
| 127 | +; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]] |
| 128 | +; CHECK-NEXT: [[FSHL:%.*]] = call i64 @llvm.fshl.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]]) |
| 129 | +; CHECK-NEXT: ret i64 [[FSHL]] |
| 130 | +; |
| 131 | + %cond = icmp eq i64 %a, 0 |
| 132 | + %fshl = call i64 @llvm.fshl.i64(i64 %a, i64 %a, i64 %b) |
| 133 | + %select = select i1 %cond, i64 0, i64 %fshl |
| 134 | + ret i64 %select |
| 135 | +} |
| 136 | + |
| 137 | +; (select (icmp x, 0, eq), 0, (fshr x, z, y)) -> leave as is |
| 138 | +define i64 @fshr_select_no_combine(i64 %a, i64 %b, i64 %c) { |
| 139 | +; CHECK-LABEL: @fshr_select_no_combine( |
| 140 | +; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0 |
| 141 | +; CHECK-NEXT: [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A]], i64 [[B:%.*]], i64 [[C:%.*]]) |
| 142 | +; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[FSHR]] |
| 143 | +; CHECK-NEXT: ret i64 [[SELECT]] |
| 144 | +; |
| 145 | + %cond = icmp eq i64 %a, 0 |
| 146 | + %fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %c) |
| 147 | + %select = select i1 %cond, i64 0, i64 %fshr |
| 148 | + ret i64 %select |
| 149 | +} |
| 150 | + |
| 151 | +; (select (icmp x, 0, eq), 0, (sdiv x, y)) -> (sdiv x, y) |
| 152 | +define i64 @sdiv_select(i64 %a, i64 %b) { |
| 153 | +; CHECK-LABEL: @sdiv_select( |
| 154 | +; CHECK-NEXT: [[DIV:%.*]] = sdiv i64 [[A:%.*]], [[B_FR:%.*]] |
| 155 | +; CHECK-NEXT: ret i64 [[DIV]] |
| 156 | +; |
| 157 | + %cond = icmp eq i64 %a, 0 |
| 158 | + %div = sdiv i64 %a, %b |
| 159 | + %select = select i1 %cond, i64 0, i64 %div |
| 160 | + ret i64 %select |
| 161 | +} |
| 162 | + |
| 163 | +; (select (icmp x, 0, eq), 0, (udiv x, y)) -> (udiv x, y) |
| 164 | +define i64 @udiv_select(i64 %a, i64 %b) { |
| 165 | +; CHECK-LABEL: @udiv_select( |
| 166 | +; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B_FR:%.*]] |
| 167 | +; CHECK-NEXT: ret i64 [[DIV]] |
| 168 | +; |
| 169 | + %cond = icmp eq i64 %a, 0 |
| 170 | + %div = udiv i64 %a, %b |
| 171 | + %select = select i1 %cond, i64 0, i64 %div |
| 172 | + ret i64 %select |
| 173 | +} |
| 174 | + |
| 175 | +; (select (icmp x, 0, eq), 0, (srem x, y)) -> (srem x, y) |
| 176 | +define i64 @srem_select(i64 %a, i64 %b) { |
| 177 | +; CHECK-LABEL: @srem_select( |
| 178 | +; CHECK-NEXT: [[REM:%.*]] = srem i64 [[A:%.*]], [[B:%.*]] |
| 179 | +; CHECK-NEXT: ret i64 [[REM]] |
| 180 | +; |
| 181 | + %cond = icmp eq i64 %a, 0 |
| 182 | + %rem = srem i64 %a, %b |
| 183 | + %select = select i1 %cond, i64 0, i64 %rem |
| 184 | + ret i64 %select |
| 185 | +} |
| 186 | + |
| 187 | +; (select (icmp x, 0, eq), 0, (urem x, y)) -> (urem x, y) |
| 188 | +define i64 @urem_select(i64 %a, i64 %b) { |
| 189 | +; CHECK-LABEL: @urem_select( |
| 190 | +; CHECK-NEXT: [[REM:%.*]] = urem i64 [[A:%.*]], [[B:%.*]] |
| 191 | +; CHECK-NEXT: ret i64 [[REM]] |
| 192 | +; |
| 193 | + %cond = icmp eq i64 %a, 0 |
| 194 | + %rem = urem i64 %a, %b |
| 195 | + %select = select i1 %cond, i64 0, i64 %rem |
| 196 | + ret i64 %select |
| 197 | +} |
| 198 | + |
| 199 | +; (select (icmp x, 0, eq), 0, (icmp x, 0, slt)) -> (icmp x, 0, slt) |
| 200 | +define i1 @icmp_slt_select(i64 %a) { |
| 201 | +; CHECK-LABEL: @icmp_slt_select( |
| 202 | +; CHECK-NEXT: [[ICMP:%.*]] = icmp slt i64 [[A:%.*]], 0 |
| 203 | +; CHECK-NEXT: ret i1 [[ICMP]] |
| 204 | +; |
| 205 | + %cond = icmp eq i64 %a, 0 |
| 206 | + %icmp = icmp slt i64 %a, 0 |
| 207 | + %select = select i1 %cond, i1 0, i1 %icmp |
| 208 | + ret i1 %select |
| 209 | +} |
| 210 | + |
| 211 | +; (select (icmp x, 0, eq), 0, (sub 0, x)) -> (sub 0, x) |
| 212 | +define i64 @sub_select(i64 %a) { |
| 213 | +; CHECK-LABEL: @sub_select( |
| 214 | +; CHECK-NEXT: [[SUB:%.*]] = sub i64 0, [[A:%.*]] |
| 215 | +; CHECK-NEXT: ret i64 [[SUB]] |
| 216 | +; |
| 217 | + %cond = icmp eq i64 %a, 0 |
| 218 | + %sub = sub i64 0, %a |
| 219 | + %select = select i1 %cond, i64 0, i64 %sub |
| 220 | + ret i64 %select |
| 221 | +} |
0 commit comments