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[OpenACC][CIR] worker/vector lowering for combined constructs
Another set of 2 line changes, but makes sure to add sufficient testing.
1 parent df78e28 commit 31fd77a

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2 files changed

+176
-0
lines changed

2 files changed

+176
-0
lines changed

‎clang/lib/CIR/CodeGen/CIRGenOpenACCClause.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -465,6 +465,8 @@ class OpenACCClauseCIREmitter final
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else
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operation.addEmptyWorker(builder.getContext(), lastDeviceTypeValues);
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} else if constexpr (isCombinedType<OpTy>) {
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applyToLoopOp(clause);
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} else {
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// TODO: When we've implemented this for everything, switch this to an
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// unreachable. Combined constructs remain.
@@ -481,6 +483,8 @@ class OpenACCClauseCIREmitter final
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else
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operation.addEmptyVector(builder.getContext(), lastDeviceTypeValues);
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} else if constexpr (isCombinedType<OpTy>) {
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applyToLoopOp(clause);
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} else {
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// TODO: When we've implemented this for everything, switch this to an
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// unreachable. Combined constructs remain.

‎clang/test/CIR/CodeGenOpenACC/combined.cpp‎

Lines changed: 172 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -401,4 +401,176 @@ extern "C" void acc_combined(int N) {
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// CHECK-NEXT: } loc
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// CHECK-NEXT: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: acc.loop combined(kernels) worker {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker(N)
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) worker(%[[N_CONV]] : si32) {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker device_type(nvidia, radeon) worker
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: acc.loop combined(kernels) worker([#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]) {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker(N) device_type(nvidia, radeon) worker
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) worker([#acc.device_type<nvidia>, #acc.device_type<radeon>], %[[N_CONV]] : si32) {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker device_type(nvidia, radeon) worker(N)
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) worker([#acc.device_type<none>], %[[N_CONV]] : si32 [#acc.device_type<nvidia>], %[[N_CONV]] : si32 [#acc.device_type<radeon>]) {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker(N) device_type(nvidia, radeon) worker(N + 1)
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: %[[N_LOAD2:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[ONE_CONST:.*]] = cir.const #cir.int<1> : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE:.*]] = cir.binop(add, %[[N_LOAD2]], %[[ONE_CONST]]) nsw : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_PLUS_ONE]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) worker(%[[N_CONV]] : si32, %[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<nvidia>], %[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<radeon>]) {
466+
// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop device_type(nvidia, radeon) worker(num:N + 1)
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[ONE_CONST:.*]] = cir.const #cir.int<1> : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE:.*]] = cir.binop(add, %[[N_LOAD]], %[[ONE_CONST]]) nsw : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_PLUS_ONE]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) worker(%[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<nvidia>], %[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<radeon>]) {
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker vector device_type(nvidia) worker vector
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: acc.loop combined(kernels) worker([#acc.device_type<none>, #acc.device_type<nvidia>]) vector([#acc.device_type<none>, #acc.device_type<nvidia>])
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop vector
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK: acc.loop combined(kernels) vector {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop vector(N)
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) vector(%[[N_CONV]] : si32) {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop vector device_type(nvidia, radeon) vector
513+
for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: acc.loop combined(kernels) vector([#acc.device_type<none>, #acc.device_type<nvidia>, #acc.device_type<radeon>]) {
516+
// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop vector(N) device_type(nvidia, radeon) vector
522+
for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) vector([#acc.device_type<nvidia>, #acc.device_type<radeon>], %[[N_CONV]] : si32) {
527+
// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop vector(N) device_type(nvidia, radeon) vector(N + 1)
533+
for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: %[[N_LOAD2:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[ONE_CONST:.*]] = cir.const #cir.int<1> : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE:.*]] = cir.binop(add, %[[N_LOAD2]], %[[ONE_CONST]]) nsw : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_PLUS_ONE]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) vector(%[[N_CONV]] : si32, %[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<nvidia>], %[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<radeon>]) {
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// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop device_type(nvidia, radeon) vector(length:N + 1)
548+
for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[ONE_CONST:.*]] = cir.const #cir.int<1> : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE:.*]] = cir.binop(add, %[[N_LOAD]], %[[ONE_CONST]]) nsw : !s32i
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// CHECK-NEXT: %[[N_PLUS_ONE_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_PLUS_ONE]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) vector(%[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<nvidia>], %[[N_PLUS_ONE_CONV]] : si32 [#acc.device_type<radeon>]) {
555+
// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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#pragma acc kernels loop worker(N) vector(N) device_type(nvidia) worker(N) vector(N)
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for(unsigned I = 0; I < N; ++I);
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// CHECK-NEXT: acc.kernels combined(loop) {
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// CHECK-NEXT: %[[N_LOAD:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD]] : !s32i to si32
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// CHECK-NEXT: %[[N_LOAD2:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV2:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD2]] : !s32i to si32
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// CHECK-NEXT: %[[N_LOAD3:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV3:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD3]] : !s32i to si32
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// CHECK-NEXT: %[[N_LOAD4:.*]] = cir.load %[[ALLOCA_N]] : !cir.ptr<!s32i>, !s32i
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// CHECK-NEXT: %[[N_CONV4:.*]] = builtin.unrealized_conversion_cast %[[N_LOAD4]] : !s32i to si32
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// CHECK-NEXT: acc.loop combined(kernels) worker(%[[N_CONV]] : si32, %[[N_CONV3]] : si32 [#acc.device_type<nvidia>]) vector(%[[N_CONV2]] : si32, %[[N_CONV4]] : si32 [#acc.device_type<nvidia>]) {
572+
// CHECK: acc.yield
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// CHECK-NEXT: } loc
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// CHECK: acc.terminator
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// CHECK-NEXT: } loc
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}

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