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1 parent 74f5a02 commit 415dd38Copy full SHA for 415dd38
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
@@ -195,7 +195,7 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
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}
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case RISCV::AUIPC:
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setGPRState(Inst.getOperand(0).getReg(),
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- Addr + (Inst.getOperand(1).getImm() << 12));
+ Addr + SignExtend64<32>(Inst.getOperand(1).getImm() << 12));
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break;
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llvm/test/tools/llvm-objdump/ELF/RISCV/branches.s
@@ -78,3 +78,9 @@ nop
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bar:
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# CHECK: 60: c.nop
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nop
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+
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+# CHECK-LABEL: 00011000 <far>:
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+.org 0x11000
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+far:
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+# CHECK: jalr ra, 0x0(ra) <foo>
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+call foo
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