From fe7c1c7ffb167bec0bafe5137e649f031d41cdc1 Mon Sep 17 00:00:00 2001 From: shore <372660931@qq.com> Date: Tue, 7 Jan 2025 17:40:36 +0800 Subject: [PATCH] change to VRegSrc_32 --- llvm/lib/Target/AMDGPU/SIInstructions.td | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 520680311a8aca..19471a55934bfd 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -3305,15 +3305,15 @@ multiclass V_SAT_PK_Pat { def: GCNPatIgnoreCopies< (i16 (conc_lo_u8_i16 (clamp_s16_u8 i16:$lo), (clamp_s16_u8 i16:$hi))), (inst - (V_LSHL_OR_B32_e64 VGPR_32:$hi, (S_MOV_B32 (i32 16)), - (V_AND_B32_e64 VGPR_32:$lo, (S_MOV_B32 (i32 0xFFFF))))) + (V_LSHL_OR_B32_e64 VRegSrc_32:$hi, (S_MOV_B32 (i32 16)), + (V_AND_B32_e64 VRegSrc_32:$lo, (S_MOV_B32 (i32 0xFFFF))))) >; def: GCNPatIgnoreCopies< (i16 (conc_lo_u8_i16 (clamp_s16_u8 i16:$lo), (smax i16:$hi, (i16 0)))), (inst - (V_LSHL_OR_B32_e64 VGPR_32:$hi, (S_MOV_B32 (i32 16)), - (V_AND_B32_e64 VGPR_32:$lo, (S_MOV_B32 (i32 0xFFFF))))) + (V_LSHL_OR_B32_e64 VRegSrc_32:$hi, (S_MOV_B32 (i32 16)), + (V_AND_B32_e64 VRegSrc_32:$lo, (S_MOV_B32 (i32 0xFFFF))))) >; def: GCNPatIgnoreCopies<