From e62d49f1a8b27002871f712e80b1785442e23393 Mon Sep 17 00:00:00 2001 From: Lee Lup Yuen Date: Fri, 19 Jan 2024 21:06:38 +0800 Subject: [PATCH] MRET to Supervisor Mode --- riscv_cpu.c | 4 ++-- riscv_machine.c | 8 +++++++- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/riscv_cpu.c b/riscv_cpu.c index ab9ae6d..214f223 100644 --- a/riscv_cpu.c +++ b/riscv_cpu.c @@ -47,7 +47,7 @@ void print_console(void *machine0, const char *buf, int len); #define DUMP_INTERRUPTS #define DUMP_INVALID_CSR #define DUMP_EXCEPTIONS -//#define DUMP_CSR +#define DUMP_CSR #define CONFIG_LOGFILE #include "riscv_cpu_priv.h" @@ -1141,7 +1141,7 @@ static void raise_exception2(RISCVCPUState *s, uint32_t cause, s->pc = s->mtvec; } //// Begin Test: Quit if cause=2, otherwise it will loop forever - if (cause == 2) { puts("tinyemu: Unknown mcause 2, quitting"); exit(1); } + // if (cause == 2) { puts("tinyemu: Unknown mcause 2, quitting"); exit(1); } //// End Test } diff --git a/riscv_machine.c b/riscv_machine.c index d5afcb8..6657a60 100644 --- a/riscv_machine.c +++ b/riscv_machine.c @@ -867,7 +867,13 @@ static void copy_bios(RISCVMachine *s, const uint8_t *buf, int buf_len, q[1] = 0x597; /* auipc a1, dtb */ q[2] = 0x58593 + ((fdt_addr - 4) << 20); /* addi a1, a1, dtb */ q[3] = 0xf1402573; /* csrr a0, mhartid */ - q[4] = 0x00028067; /* jalr zero, t0, jump_addr */ + + //// Previously: Jump to RAM_BASE_ADDR in Machine Mode + // q[4] = 0x00028067; /* jalr zero, t0, jump_addr */ + + //// Jump to RAM_BASE_ADDR in Supervisor Mode + q[4] = 0x34129073; // csrw mepc, t0 + q[5] = 0x30200073; // mret } static void riscv_flush_tlb_write_range(void *opaque, uint8_t *ram_addr,