Elvin Yung
- Synchronous sequential circuits have clocks.
- Asynchronous sequential circuits do not.
- The most fundamental persistent circuit is the NOR-gate set-reset latch.
- The SR NOR latch maintains feedback using two connected NOR gates.
- As long as S and R are both 0, the value of Q will be persisted.
- When S and R are both 1, Q and not Q are both set to 0. This may lock the output at 1 or 0, causing a race condition.
- Some of the problems of the SR Latch can be mitigated with the D Latch.
- The core concept of D latch is based on the augmentation of the SR latch with a clock.
- The value of Q can only be modified (from the input D) if and only if the value of C, the clock, is 1.
- We want state to be affected only at discrete points in time.
- A master-slave design achieves this.
- The D flip-flop implements two D latches
- A Register is an array of flip-flops, 32 for a word register.
- A register file is a way of organizing registers.
- In assembly, you essentially want to read from a maximum of two registers at once, or write to one register.
- The read logic for a register file consists of two multiplexors, which select data from two registers.
- The write logic consists of a decoder which writes to some register.
- Static random access memories (SRAM) use D latches.
- To mitigate the problem of
- The register file doesn't scale, since multiplexors and decoders are too big.
- To fix the multiplexor problem, we use three-state buffers.
- To fix the decoder problem, use two level decoding.
- This type of memory is not clocked.
- A three-state buffer has three outputs: 0, 1, and floating.
- The behaviour of sequential systems is essentially stateful.
- Finite state machines are used to maintain discrete states.
- It is impossible to use a truth table to define a finite state machine, since a truth table is binary.