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counter.v
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counter.v
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//============================================================================//
// //
// Parameterize Counter //
// //
// Module name: counter //
// Desc: parameterized counter, counts up/down in any increment //
// Date: Oct 2011 //
// Developer: Rurik Primiani & Wesley New //
// Licence: GNU General Public License ver 3 //
// Notes: //
// //
//============================================================================//
module counter #(
//==============================
// Top level block parameters
//==============================
parameter DATA_WIDTH = 21, // number of bits in counter
parameter COUNT_FROM = 0, // start with this number
parameter COUNT_TO = 834168, // value to count to in CL case
parameter STEP = 1 // negative or positive, sets direction
) (
//===============
// Input Ports
//===============
input clk,
input en,
input rst,
//===============
// Output Ports
//===============
output reg [DATA_WIDTH-1:0] out
);
// Synchronous logic
always @(posedge clk)
begin
// if ACTIVE_LOW_RST is defined then reset on a low
// this should be defined on a system-wide basis
if ((`ifdef ACTIVE_LOW_RST rst `else !rst `endif) && out < COUNT_TO)
begin
if (en == 1)
begin
out <= out + STEP;
end
end
else
begin
out <= COUNT_FROM;
end // else: if(rst != 0)
end
endmodule