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align to 4 bytes
FrameRegister[] {
uint16 : Dwarf RegNum
int16 : Offset
uint8 : Size in Bytes
uint8 : Flags {
bool : IsSpilled
bool : Reserved [7]
}
}
This seems tied specifically to the assumption that registers are
spilled on entry. Given the recent work towards shrink wrapping, is
that something we want to do?
p.s. What's with the IsSpilled bit? Why would you have a record for
an unspilled register?
This was done before shrink wrapping and pristine register support.
The original problem was that the live-out set didn’t contain pristine
registers and we have to add all callee-saved register to the live-out
set too to make sure we didn’t miss anything. We could do better by
recording which callee-save registers actually got spilled and which not.
Makes sense, but isn't this still per call site information, not per
function? The format seems to imply per-function.
Implement the StackMap v2 proposed on LLVM list:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/087867.html
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