The section:

"The output clock type, periodic or aperiodic, is defined by the sending FMU. This allows the FMU (or better the exporting tool) to balance the accuracy and performance of its network communication:

While aperiodic clocks allow very accurate network simulations, frequently entering Event Mode will reduce the network simulation speed.

Using periodic clocks reduces the number of Event Modes required and speeds up the simulation at the cost of simulation accuracy, because timing must be forced into a fixed grid and some intermediate values might not be transmitted.

One could use (structural) parameters to define the accuracy of aperiodic clocks, allowing control of the simulation accuracy and performance with the same FMU.

The input clocks shall be triggered clocks."

suggest that using periodic clocks are always fast (in topic of performance) and aperiodic clocks are accurate but slow. This cannot be defined as a common rule, but depends on the specific bus type. Scheduled bus types (like LIN or FlexRay) can be much faster using aperiodic clocks.

This section (also within low-cut section, see Clocks section) shall be fixed an verbalized more precisely.