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RX TX switch problem #50

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wuyuanyi135 opened this issue Mar 1, 2016 · 0 comments
Open

RX TX switch problem #50

wuyuanyi135 opened this issue Mar 1, 2016 · 0 comments

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@wuyuanyi135
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In my project I tested several method to make duplex communication. But for some reasons, they are all imperfect.

FYI,

Rate: 1Mbps
Power: Max
Length: dynamic 
(fill here later)

TX-RX swapping

I pulled down CE when switching mode

Seq# Device 1 Device 2 Comment
0 Configure as PRX Configure as PRX Initialize
1 Configure as PTX Device 1 wants to send message to Device 2
2 Write TX payload, then pulse CE
3 TX_DS RX_DR
4 Return RX mode Enter TX mode Device 2 sends responses
5 Write TX payload, then pulse CE
6 RX_DR TX_DS
7 Return RX mode

In my case, this schema works. But once I burst some packets from device 1 to device 2, the connection breaks. Even if the traffic is pretty low (1 packet per second), the communication does not last ever.

The reason was that, the device 1 failed to initiate the communication. In phase 3, device 1 receives MAX_RT because the packet was not transmitted successfully.

My guess is, the phase 4 and phase 7 may fail unpredictably. I have periodically fetched the config register and found that the during these phases, the device stays in PTX longer than I expected (maybe more than 5 seconds).

Ack with payload

In this mode I decide to make the device 2 as slave, which will only respond to device 1 but never initiate the session.

Seq# Device 1 Device 2 Comment
0 Configure as PTX Configure as PRX Initialize
1 Configure as PTX Device 1 wants to send message to Device 2
2 Write TX payload, then pulse CE
3 TX_DS RX_DR
4 Prepare something and send to ACK_PAYLOAD See *
5 RX_DR TX_DS
  • In documentation, it is recommended to prepare the packet BEFORE RX_DR. However, I found if I write the payload in time (direct respond in ISR), it still works.

In this case, something bad may happen in phase 4-5. I tracked the FIFO_STATUS register. Ideally, after each cycle, the FIFO_STATUS of device 2 should be 0x11 (TX empty, RX empty). However, when it goes down, the status is 0x01 (TX not empty). I guess the device 1 fails to get to RX (internally) to get the returned packet.

I suspect my boards are fake (hardware malfunction); If there is someone can give an example, that can ping-pong in high frequency (~10 packets / second) while being stable for long time (hours).

Thank you

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