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It's named timer_reset because it is supposed to read from timer one cycle after writing to timer enable. It does this by using DMA 1 to start the timer, then DMA 0 to read the timer. DMA's are started with consecutive writes, so DMA 0 should take over exactly when DMA 1 has finished writing to the timer reg.
NanoboyAdvance currently fails one of the tests, but I can't tell why. Works on GBP though.
The text was updated successfully, but these errors were encountered:
Oh, I think this relates to that after enabling the timer it can tick right away but it takes a cycle to load the reload value into the counter. So far I accounted for the case specifically where this would cause a timer overflow, but I didn't handle the case where a counter read would happen right after enabling the timer correctly yet.
I have a new test here that currently doesn't work on NanoboyAdvacnce:
https://github.com/alyosha-tas/gba-tests/blob/master/timer/timer_reset.gba
It's named timer_reset because it is supposed to read from timer one cycle after writing to timer enable. It does this by using DMA 1 to start the timer, then DMA 0 to read the timer. DMA's are started with consecutive writes, so DMA 0 should take over exactly when DMA 1 has finished writing to the timer reg.
NanoboyAdvance currently fails one of the tests, but I can't tell why. Works on GBP though.
The text was updated successfully, but these errors were encountered: