diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/AMDAIEVectorization.cpp b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/AMDAIEVectorization.cpp
index fa661b784..cec0c635b 100644
--- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/AMDAIEVectorization.cpp
+++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/AMDAIEVectorization.cpp
@@ -100,6 +100,7 @@ void AMDAIEVectorizationPass::runOnOperation() {
   RewritePatternSet vectorizationPatterns(funcOp.getContext());
 
   vector::populateVectorReductionToContractPatterns(vectorizationPatterns);
+  vector::populateSinkVectorOpsPatterns(vectorizationPatterns);
 
   // Including this pattern prevents broadcasting in vector.transfer_read ops
   vector::populateVectorTransferPermutationMapLoweringPatterns(
diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/test/create_reference_to_allocation.mlir b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/test/create_reference_to_allocation.mlir
index 8bd685873..9145088dd 100644
--- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/test/create_reference_to_allocation.mlir
+++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Transforms/test/create_reference_to_allocation.mlir
@@ -1,4 +1,4 @@
-// RUN: iree-opt --split-input-file --pass-pipeline="builtin.module(func.func(iree-amdaie-create-reference-to-allocation, iree-hoist-statically-bound-allocations))" %s | FileCheck %s
+// RUN: iree-opt --split-input-file --pass-pipeline="builtin.module(func.func(iree-amdaie-create-reference-to-allocation, iree-codegen-hoist-statically-bound-allocations))" %s | FileCheck %s
 
 // CHECK-LABEL: func.func @single_alloc
 // CHECK:  %[[ALLOC:.+]] = memref.alloc() : memref<8x16xi32, 2 : i32>
diff --git a/sync_deps.py b/sync_deps.py
index 9f8444748..0d0e470c7 100644
--- a/sync_deps.py
+++ b/sync_deps.py
@@ -7,7 +7,7 @@
 ### Update with: shark-workspace pin
 
 PINNED_VERSIONS = {
-  "iree": "5a48912c52f65ead960bec9bfde5a836d1b02ab2",
+  "iree": "60b65f30c932eaf967922785253a85a1aa14cebb",
 }
 
 ORIGINS = {
diff --git a/tests/samples/conv_pipeline_e2e.mlir b/tests/samples/conv_pipeline_e2e.mlir
index 7c6957017..ffe8222f8 100644
--- a/tests/samples/conv_pipeline_e2e.mlir
+++ b/tests/samples/conv_pipeline_e2e.mlir
@@ -24,7 +24,7 @@ func.func @conv_2d_nhwc_hwcf_q(%arg0: tensor<2x14x14x32xi8>, %arg1: tensor<3x3x3
   return %2 : tensor<2x12x12x64xi32>
 }
 
-// CHECK-LABEL: hal.executable.export public @conv_2d_nhwc_hwcf_q_dispatch_0_conv_2d_nhwc_hwcf_q_2x12x12x64x3x3x32_i8xi8xi32xi32xi32
+// CHECK-LABEL: hal.executable.export public @conv_2d_nhwc_hwcf_q_dispatch_0_conv_2d_nhwc_hwcf_2x12x12x64x3x3x32_i8xi8xi32
 //       CHECK:    aie.device(npu1_4col)
 //       CHECK:    aie.shim_dma_allocation
 //       CHECK:    aie.shim_dma_allocation