@@ -142,19 +142,45 @@ static int l_uart_write( lua_State* L )
142
142
return 0 ;
143
143
}
144
144
145
+ #define DIR_RX 0
146
+ #define DIR_TX 1
147
+
148
+ static int l_uart_fifodepth ( lua_State * L )
149
+ {
150
+ int id = luaL_optinteger ( L , 1 , 0 );
151
+ if ((id != 0 ) && (id != 1 ))
152
+ return luaL_argerror (L , 1 , "Bad UART id; must be 0 or 1" );
153
+
154
+ int dir = luaL_optinteger ( L , 2 , 0 );
155
+ if ((dir != DIR_RX ) && (dir != DIR_TX ))
156
+ return luaL_argerror (L , 2 , "Bad direction; must be DIR_RX or DIR_TX" );
157
+
158
+ int reg = READ_PERI_REG (UART_STATUS (id ));
159
+ int rsh = reg >> ((dir == DIR_RX ) ? UART_RXFIFO_CNT_S : UART_TXFIFO_CNT_S );
160
+ int rm = rsh & ((dir == DIR_RX ) ? UART_RXFIFO_CNT : UART_TXFIFO_CNT );
161
+
162
+ lua_pushinteger (L , rm );
163
+ return 1 ;
164
+ }
165
+
145
166
// Module function map
146
167
LROT_BEGIN (uart , NULL , 0 )
147
168
LROT_FUNCENTRY ( setup , l_uart_setup )
148
169
LROT_FUNCENTRY ( getconfig , l_uart_getconfig )
149
170
LROT_FUNCENTRY ( write , l_uart_write )
150
171
LROT_FUNCENTRY ( on , l_uart_on )
151
172
LROT_FUNCENTRY ( alt , l_uart_alt )
173
+ LROT_FUNCENTRY ( fifodepth , l_uart_fifodepth )
174
+
152
175
LROT_NUMENTRY ( STOPBITS_1 , PLATFORM_UART_STOPBITS_1 )
153
176
LROT_NUMENTRY ( STOPBITS_1_5 , PLATFORM_UART_STOPBITS_1_5 )
154
177
LROT_NUMENTRY ( STOPBITS_2 , PLATFORM_UART_STOPBITS_2 )
155
178
LROT_NUMENTRY ( PARITY_NONE , PLATFORM_UART_PARITY_NONE )
156
179
LROT_NUMENTRY ( PARITY_EVEN , PLATFORM_UART_PARITY_EVEN )
157
180
LROT_NUMENTRY ( PARITY_ODD , PLATFORM_UART_PARITY_ODD )
181
+
182
+ LROT_NUMENTRY ( DIR_RX , DIR_RX )
183
+ LROT_NUMENTRY ( DIR_TX , DIR_TX )
158
184
LROT_END (uart , NULL , 0 )
159
185
160
186
0 commit comments