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Refactors CpuStates::set_pstate #969

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Sep 6, 2024
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1 change: 1 addition & 0 deletions src/core/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@ edition = "2021"
crate-type = ["staticlib"]

[dependencies]
bitfield-struct = "0.8.0"
humansize = "2.1.3"
libc = "0.2.155"
obconf = { path = "../obconf" }
Expand Down
11 changes: 9 additions & 2 deletions src/core/src/vmm/aarch64.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
// SPDX-License-Identifier: MIT OR Apache-2.0
use super::hv::{Cpu, CpuFeats, CpuStates};
use super::hv::{Cpu, CpuFeats, CpuStates, Pstate};
use super::hw::RamMap;
use super::MainCpuError;

Expand Down Expand Up @@ -31,7 +31,14 @@ pub fn setup_main_cpu(
// Set PSTATE so the PE run in AArch64 mode. Not sure why we need M here since the document said
// it is ignore. See https://gist.github.com/imbushuo/51b09e61ecd7b7ac063853ad65cedf34 where
// M = 5 came from.
states.set_pstate(true, true, true, true, 0b101);
states.set_pstate(
Pstate::new()
.with_m(0b101)
.with_f(true)
.with_i(true)
.with_a(true)
.with_d(true),
);

// Enable MMU to enable virtual address and set TCR_EL1.
states.set_sctlr_el1(true);
Expand Down
16 changes: 16 additions & 0 deletions src/core/src/vmm/hv/aarch64.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
// SPDX-License-Identifier: MIT OR Apache-2.0
use bitfield_struct::bitfield;

/// Features available on a PE.
pub struct CpuFeats {
Expand Down Expand Up @@ -37,3 +38,18 @@ pub struct CpuFeats {
/// - `0b0101`: 48 bits, 256TB.
pub pa_range: u8,
}

/// Represents a value of `PSTATE`.
#[bitfield(u32)]
pub struct Pstate {
#[bits(4)]
pub m: u8,
#[bits(2)]
__: u8,
pub f: bool,
pub i: bool,
pub a: bool,
pub d: bool,
#[bits(22)]
__: u32,
}
12 changes: 2 additions & 10 deletions src/core/src/vmm/hv/macos/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -302,16 +302,8 @@ impl<'a, 'b> CpuStates for HfStates<'a, 'b> {
}

#[cfg(target_arch = "aarch64")]
fn set_pstate(&mut self, d: bool, a: bool, i: bool, f: bool, m: u8) {
let d: u64 = d.into();
let a: u64 = a.into();
let i: u64 = i.into();
let f: u64 = f.into();
let m: u64 = m.into();

assert_eq!(m & 0b11110000, 0);

self.pstate = State::Dirty(d << 9 | a << 8 | i << 7 | f << 6 | m);
fn set_pstate(&mut self, v: crate::vmm::hv::Pstate) {
self.pstate = State::Dirty(v.into_bits().into());
}

#[cfg(target_arch = "aarch64")]
Expand Down
4 changes: 1 addition & 3 deletions src/core/src/vmm/hv/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -104,10 +104,8 @@ pub trait CpuStates {
#[cfg(target_arch = "x86_64")]
fn set_ss(&mut self, p: bool);

/// # Panics
/// If `m` larger than 4 bits.
#[cfg(target_arch = "aarch64")]
fn set_pstate(&mut self, d: bool, a: bool, i: bool, f: bool, m: u8);
fn set_pstate(&mut self, v: Pstate);

#[cfg(target_arch = "aarch64")]
fn set_sctlr_el1(&mut self, m: bool);
Expand Down