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mlnx-cpld-drv.c
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mlnx-cpld-drv.c
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/**
*
* Copyright (C) Mellanox Technologies Ltd. 2001-2015. ALL RIGHTS RESERVED.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/version.h>
#include <linux/acpi.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/list.h>
#include <linux/kref.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/dmi.h>
#include <linux/string.h>
#include "arch/x86/include/mlnx-common.h"
#include "mlnx-mux-drv.h"
#include "mlnx-common-drv.h"
#include "mlnx-sys-type.h"
#define THREAD_IRQ_SLEEP_SECS 2
#define THREAD_IRQ_SLEEP_MSECS (THREAD_IRQ_SLEEP_SECS * MSEC_PER_SEC)
#define LED_NUM 7
#define PSU_MODULE_NUM 2
#define FAN_MODULE_NUM 4
#define CPLD_NUM 3
#define RESET_NUM 3
#define WP_REG_NUM 4
#define INIT_REG_NUM 2
#define MUX_NUM 2
#define MUX_CHAN_NUM 8
#define MAX_LED_STATUS 11
#define MAX_LED_NAME_LEN 32
#define LED_IS_OFF 0x00
#define LED_CNTRL_BY_CPLD 0x01
#define LED_RED_STATIC_ON 0x05
#define LED_RED_BLINK_3HZ 0x06
#define LED_RED_BLINK_6HZ 0x07
#define LED_YELLOW_STATIC_ON 0x09
#define LED_YELLOW_BLINK_3HZ 0x0A
#define LED_YELLOW_BLINK_6HZ 0x0B
#define LED_GREEN_STATIC_ON 0x0D
#define LED_GREEN_BLINK_3HZ 0x0E
#define LED_GREEN_BLINK_6HZ 0x0F
#define NOT_USED_LED_OFFSET 0xFE
typedef enum led_color {
led_nocolor = 0,
led_yellow = 1 << 0,
led_yellow_blink = 1 << 1,
led_green = 1 << 2,
led_green_blink = 1 << 3,
led_red = 1 << 4,
led_blue = 1 << 5,
led_red_blink = 1 << 6,
led_yellow_blink_fast = 1 << 7,
led_green_blink_fast = 1 << 8,
led_red_blink_fast = 1 << 9,
led_cpld_ctrl = 1 << 10,
led_all = 0x7fffffff,
led_not_exist = 0xffffffff,
} led_color_t;
typedef enum reset_cause {
cause_clean = 0x00,
cause_long_pb = 0x01,
cause_short_pb = 0x02,
cause_aux_pwr_off_or_fu = 0x04,
cause_power_fail = 0x08,
cause_sw_rst = 0x10,
cause_fw_rst = 0x20,
cause_watch_dog = 0x40,
cause_thermal_shutdown = 0x80,
} reset_cause_t;
static inline const char *led_color_code_2string(led_color_t color)
{
switch (color) {
case led_nocolor:
return "none";
case led_yellow:
return "yellow";
case led_green:
return "green";
case led_red:
return "red";
case led_blue:
return "blue";
case led_yellow_blink:
return "yellow_blink";
case led_green_blink:
return "green_blink";
case led_red_blink:
return "red_blink";
case led_yellow_blink_fast:
return "yellow_blink_fast";
case led_green_blink_fast:
return "green_blink_fast";
case led_red_blink_fast:
return "red_blink_fast";
case led_cpld_ctrl:
return "cpld_control";
case led_all:
case led_not_exist:
default:
return "not exist";
}
}
static inline const char *led_color_mask_2string(u32 color_mask, int flag)
{
switch (color_mask) {
case LED_IS_OFF:
return "none";
case LED_CNTRL_BY_CPLD:
return "cpld_control";
case LED_RED_STATIC_ON:
return "red";
case LED_RED_BLINK_3HZ:
return "red_blink";
case LED_RED_BLINK_6HZ:
return "red_blink_fast";
case LED_YELLOW_STATIC_ON:
return "yellow";
case LED_YELLOW_BLINK_3HZ:
return "yellow_blink";
case LED_YELLOW_BLINK_6HZ:
return "yellow_blink_fast";
case LED_GREEN_STATIC_ON:
if (flag)
return "blue";
else
return "green";
case LED_GREEN_BLINK_3HZ:
if (flag)
return "blue_blink";
else
return "green_blink";
case LED_GREEN_BLINK_6HZ:
if (flag)
return "blue_blink_fast";
else
return "green_blink_fast";
default:
return "not exist";
}
}
static inline led_color_t led_color_string_2code(const char *buf)
{
if (!strncmp(buf, "none", strlen("none")))
return led_nocolor;
else if (!strncmp(buf, "yellow_blink_fast", strlen("yellow_blink_fast")))
return led_yellow_blink_fast;
else if (!strncmp(buf, "green_blink_fast", strlen("green_blink_fast")))
return led_green_blink_fast;
else if (!strncmp(buf, "red_blink_fast", strlen("red_blink_fast")))
return led_red_blink_fast;
else if (!strncmp(buf, "yellow_blink", strlen("yellow_blink")))
return led_yellow_blink;
else if (!strncmp(buf, "green_blink", strlen("green_blink")))
return led_green_blink;
else if (!strncmp(buf, "red_blink", strlen("red_blink")))
return led_red_blink;
else if (!strncmp(buf, "yellow", strlen("yellow")))
return led_yellow;
else if (!strncmp(buf, "green", strlen("green")))
return led_green;
else if (!strncmp(buf, "red", strlen("red")))
return led_red;
else if (!strncmp(buf, "cpld_control", strlen("cpld_control")))
return led_cpld_ctrl;
else if (!strncmp(buf, "blue", strlen("blue")))
return led_green;
else if (!strncmp(buf, "blue_blink", strlen("blue_blink")))
return led_green_blink;
else if (!strncmp(buf, "blue_blink_fast", strlen("blue_blink_fast")))
return led_green_blink_fast;
else
return led_not_exist;
}
static inline int led_color_string_2mask(const char *buf)
{
if (!strncmp(buf, "none", strlen("none")))
return LED_IS_OFF;
else if (!strncmp(buf, "yellow_blink_fast", strlen("yellow_blink_fast")))
return LED_YELLOW_BLINK_6HZ;
else if (!strncmp(buf, "green_blink_fast", strlen("green_blink_fast")))
return LED_GREEN_BLINK_6HZ;
else if (!strncmp(buf, "red_blink_fast", strlen("red_blink_fast")))
return LED_RED_BLINK_6HZ;
else if (!strncmp(buf, "yellow_blink", strlen("yellow_blink")))
return LED_YELLOW_BLINK_3HZ;
else if (!strncmp(buf, "green_blink", strlen("green_blink")))
return LED_GREEN_BLINK_3HZ;
else if (!strncmp(buf, "red_blink", strlen("red_blink")))
return LED_RED_BLINK_3HZ;
else if (!strncmp(buf, "yellow", strlen("yellow")))
return LED_YELLOW_STATIC_ON;
else if (!strncmp(buf, "green", strlen("green")))
return LED_GREEN_STATIC_ON;
else if (!strncmp(buf, "red", strlen("red")))
return LED_RED_STATIC_ON;
else if (!strncmp(buf, "cpld_control", strlen("cpld_control")))
return LED_CNTRL_BY_CPLD;
else if (!strncmp(buf, "blue_blink_fast", strlen("blue_blink_fast")))
return LED_GREEN_BLINK_6HZ;
else if (!strncmp(buf, "blue_blink", strlen("blue_blink")))
return LED_GREEN_BLINK_3HZ;
else if (!strncmp(buf, "blue", strlen("blue")))
return LED_GREEN_STATIC_ON;
else
return -1;
}
static inline char *reset_cause_code_2string(reset_cause_t cause)
{
switch (cause) {
case cause_clean:
return "clean";
case cause_long_pb:
return "long press button";
case cause_short_pb:
return "short press button";
case cause_aux_pwr_off_or_fu:
return "aux pwr off or field upgr";
case cause_power_fail:
return "power fail";
case cause_sw_rst:
return "sw reset";
case cause_fw_rst:
return "fw reset";
case cause_watch_dog:
return "watch dog";
case cause_thermal_shutdown:
return "switch brd pwr fail";
default:
return "not exist or mixed";
}
}
typedef enum event_type {
no_event = 0,
psu_event = 1,
power_event = 2,
psu_alarm = 3,
fan_event = 4,
} event_type_t;
/**
* cpld_led_profile (defined per system class) -
* @offset - offset for led access in CPLD device
* @mask - mask for led access in CPLD device
* @base_color - base color code
* @brightness - default brightness setting (on/off)
* @name - led name
**/
struct cpld_led_profile {
u8 offset;
u8 mask;
u8 num_capabilities;
u8 blue_flag;
const char *capability[MAX_LED_STATUS];
};
struct cpld_leds_profile {
u8 fan_led_offset;
u8 psu_led_offset;
u8 status_led_offset;
u8 uid_led_offset;
u8 bp_led_offset;
struct cpld_led_profile *profile;
};
static struct cpld_leds_profile leds_profile;
struct cpld_led_profile led_default_profile[] = {
{
.offset = 0x21,
.mask = 0xf0,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x21,
.mask = 0x0f,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x22,
.mask = 0xf0,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x22,
.mask = 0x0f,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x20,
.mask = 0xf0,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x20,
.mask = 0x0f,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
};
/* Profile fit the Mellanox systems based on "msn2100" */
struct cpld_led_profile led_msn2100_profile[] = {
{
.offset = 0x21,
.mask = 0xf0,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x23,
.mask = 0xf0,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x23,
.mask = 0x0f,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x20,
.mask = 0xf0,
.num_capabilities = 8,
.blue_flag = 0,
.capability = { "none", "cpld_control", "green_blink_fast",
"red_blink_fast", "green_blink", "red_blink",
"green", "red" },
},
{
.offset = 0x24,
.mask = 0xf0,
.num_capabilities = 5,
.blue_flag = 1,
.capability = { "none", "cpld_control", "blue_blink_fast",
"blue_blink", "blue" },
},
};
struct led_params {
u8 offset; /* LED offset within CPLD address space */
u8 access_mask; /* LED access mask */
u8 num_led_capability;
u8 blue_flag;
const char *capability[MAX_LED_STATUS];
};
struct led_config {
struct mlnx_bsp_entry entry; /* Entry id */
struct led_params params;
led_color_t led_cache;
};
struct led_config_params {
u8 num_led;
u8 led_alarm_mask;
struct led_config led[LED_NUM];
};
struct module_params {
u8 offset; /* Offset within CPLD address space */
u8 bit; /* Bit access */
};
struct topology_params {
u8 mux; /* MUX on which device is connecetd */
u8 addr; /* Address where device is located */
};
struct module_psu_config {
struct mlnx_bsp_entry entry; /* Entry id */
struct module_params presence_status;
struct module_params presence_event;
struct module_params presence_mask;
u8 presence_status_cache;
struct module_params power_status;
struct module_params power_event;
struct module_params power_mask;
u8 power_status_cache;
struct module_params alarm_status;
struct module_params alarm_event;
struct module_params alarm_mask;
u8 alarm_status_cache;
struct module_params pwr_off;
struct topology_params topology;
struct topology_params eeprom_topology;
struct i2c_adapter *control_adapter;
struct i2c_client *control_client;
struct i2c_adapter *eeprom_adapter;
struct i2c_client *eeprom_client;
};
struct module_psu_config_params {
u8 num_psu_modules;
u8 num_fixed_psu_modules;
u8 presence_status_cache;
u8 power_status_cache;
u8 alarm_status_cache;
u8 mask;
struct module_psu_config module[PSU_MODULE_NUM];
};
struct module_fan_config {
struct mlnx_bsp_entry entry; /* Entry id */
struct module_params presence_status;
struct module_params presence_event;
struct module_params presence_mask;
u8 presence_status_cache;
struct topology_params eeprom_topology;
struct i2c_adapter *eeprom_adapter;
struct i2c_client *eeprom_client;
};
struct module_fan_config_params {
u8 num_fan_modules;
u8 presence_status_cache;
u8 mask;
struct module_fan_config module[FAN_MODULE_NUM];
};
struct info_params {
struct mlnx_bsp_entry entry; /* Entry id */
u8 version_offset; /* Offset of version within CPLD address space */
};
struct info_config_params {
u8 num_cpld;
struct info_params info[CPLD_NUM];
};
struct reset_params {
struct mlnx_bsp_entry entry; /* Entry id */
u8 offset; /* Offset within CPLD address space */
u8 bit; /* Bit access */
};
struct reset_config_params {
u8 num_reset;
struct reset_params reset[RESET_NUM];
};
struct mux_params {
char *mux_driver;
u8 parent_mux;
struct cpld_mux_platform_data *platform;
struct i2c_adapter *adapter;
struct i2c_client *client;
};
struct mux_config_params {
u8 num_mux;
struct mux_params mux[RESET_NUM];
};
struct cpld_data;
typedef int (*exec_entry)(struct cpld_data *cplddata, u8 id, u8 status,
u8 extra_status, event_type_t event);
struct exec_table {
exec_entry psu_exec_entry;
exec_entry fan_exec_entry;
exec_entry fan_init_entry;
exec_entry fan_exit_entry;
exec_entry psu_init_entry;
exec_entry psu_exit_entry;
};
struct cpld_data {
struct list_head list;
struct kref kref;
__u16 base; /* Low Pin Count (LPC) bus access base address */
__u16 size; /* Size of mapped address space */
struct device *hwmon_dev;
struct device *cpld_hwmon_dev;
const char *name;
struct mutex access_lock;
unsigned long last_update; /* in jiffies */
struct led_config_params cfg_led;
struct module_fan_config_params cfg_fan_module;
struct module_psu_config_params cfg_psu_module;
struct info_config_params cfg_info;
struct reset_config_params cfg_reset;
struct module_params top_aggregation_status;
struct module_params top_aggregation_mask;
u8 top_aggregation_cache;
struct module_params wp_reg_offset[WP_REG_NUM];
struct module_params init_reg_offset[INIT_REG_NUM];
struct module_params init_reg_mask[INIT_REG_NUM];
struct exec_table exec_tab;
spinlock_t lock;
wait_queue_head_t poll_wait;
u8 int_occurred;
int int_disable_counter;
int irq;
struct delayed_work dwork;
u8 resched_on_exit;
};
/* Container structure */
struct cpld_container {
struct list_head list;
struct device *cpld_hwmon_dev;
struct mux_config_params cfg_mux;
enum mlnx_system_types mlnx_system_type;
};
static struct cpld_container cpld_db;
#define CPLD_DRV_VERSION "0.0.1 24/08/2015"
#define CPLD_DRV_DESCRIPTION "Mellanox CPLD BSP driver. Build:" " "__DATE__" "__TIME__
MODULE_AUTHOR("Vadim Pasternak ([email protected])");
MODULE_DESCRIPTION(CPLD_DRV_DESCRIPTION);
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("mlnx-cpld");
static bool led_control = 0;
module_param(led_control, bool, 0);
MODULE_PARM_DESC(led_control, "Handle LED and FAN inside driver, default is NO");
static bool fan_control = 0;
module_param(fan_control, bool, 0);
MODULE_PARM_DESC(fan_control, "Handle LED and FAN inside driver, default is NO");
static bool interrupt_mode = 1;
module_param(interrupt_mode, bool, 0);
MODULE_PARM_DESC(interrupt_mode, "Run driver with interrupt handling, default is YES");
static unsigned short num_led = 6;
module_param(num_led, ushort, 0);
MODULE_PARM_DESC(num_led, "Number of LED, default is 6");
static unsigned short num_fixed_psu_modules = 0;
static unsigned short num_psu_modules = 2;
module_param(num_psu_modules, ushort, 0);
MODULE_PARM_DESC(num_psu_modules, "Number of replacable PSU modules, default is 2");
static unsigned short num_fan_modules = 4;
module_param(num_fan_modules, ushort, 0);
MODULE_PARM_DESC(num_fan_modules, "Number of replacable FAN modules, default is 4");
static unsigned short num_cpld = 3;
module_param(num_cpld, ushort, 0);
MODULE_PARM_DESC(num_cpld, "Number of CPLD, default is 3");
static unsigned short num_reset = 3;
module_param(num_reset, ushort, 0);
MODULE_PARM_DESC(num_reset, "Number of reset signals, default is 3");
static unsigned short num_mux = 2;
module_param(num_mux, ushort, 0);
MODULE_PARM_DESC(num_mux, "Number of mux devices, default is 2");
static int def_led_alarm_color = led_red;
module_param(def_led_alarm_color, int, 0);
MODULE_PARM_DESC(def_led_alarm_color, "Default LED alarm color is led_red");
static unsigned short psu_module_presence_status_offset[PSU_MODULE_NUM] = { 0x58, 0x58 };
module_param_array(psu_module_presence_status_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_presence_status_offset, "Module status offsets vector (default)");
static unsigned short psu_module_presence_event_offset[PSU_MODULE_NUM] = { 0x59, 0x59 };
module_param_array(psu_module_presence_event_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_presence_event_offset, "Module event offsets vector (default)");
static unsigned short psu_module_presence_mask_offset[PSU_MODULE_NUM] = { 0x5a, 0x5a };
module_param_array(psu_module_presence_mask_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_presence_mask_offset, "Module mask offsets vector (default)");
static unsigned short psu_module_power_status_offset[PSU_MODULE_NUM] = { 0x64, 0x64 };
module_param_array(psu_module_power_status_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_power_status_offset, "Module power status offsets vector (default)");
static unsigned short psu_module_power_event_offset[PSU_MODULE_NUM] = { 0x65, 0x65 };
module_param_array(psu_module_power_event_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_power_event_offset, "Module power event offsets vector (default)");
static unsigned short psu_module_power_mask_offset[PSU_MODULE_NUM] = { 0x66, 0x66 };
module_param_array(psu_module_power_mask_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_power_mask_offset, "Module power mask offsets vector (default)");
static unsigned short psu_module_alarm_status_offset[PSU_MODULE_NUM] = { 0x6a, 0x6a };
module_param_array(psu_module_alarm_status_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_alarm_status_offset, "Module alarm status offsets vector (default)");
static unsigned short psu_module_alarm_event_offset[PSU_MODULE_NUM] = { 0x6b, 0x6b };
module_param_array(psu_module_alarm_event_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_alarm_event_offset, "Module alarm event offsets vector (default)");
static unsigned short psu_module_alarm_mask_offset[PSU_MODULE_NUM] = { 0x6c, 0x6c };
module_param_array(psu_module_alarm_mask_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_alarm_mask_offset, "Module alarm status offsets vector (default)");
static unsigned short psu_module_pwr_off_offset[PSU_MODULE_NUM] = { 0x30, 0x30 };
module_param_array(psu_module_pwr_off_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_pwr_off_offset, "Module power off offsets vector (default)");
static unsigned short psu_module_pwr_off_bit[PSU_MODULE_NUM] = { 0, 1 };
module_param_array(psu_module_pwr_off_bit, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_pwr_off_bit, "Module power off bit vector (default)");
static unsigned short psu_module_mux[PSU_MODULE_NUM] = { 10, 10 };
module_param_array(psu_module_mux, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_mux, "PSU module mux vector (default)");
static unsigned short psu_module_addr[PSU_MODULE_NUM] = { 0x59, 0x58 };
module_param_array(psu_module_addr, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_addr, "PSU module address vector (default)");
static unsigned short psu_module_bit[PSU_MODULE_NUM] = { 0, 1 };
module_param_array(psu_module_bit, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_module_bit, "PSU module bit vector (default)");
static unsigned short fan_module_presence_status_offset[FAN_MODULE_NUM] = { 0x88, 0x88, 0x88, 0x88};
module_param_array(fan_module_presence_status_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(fan_module_presence_status_offset, "Module status offsets vector (default)");
static unsigned short fan_module_presence_event_offset[FAN_MODULE_NUM] = { 0x89, 0x89, 0x89, 0x89};
module_param_array(fan_module_presence_event_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(fan_module_presence_event_offset, "Module event offsets vector (default)");
static unsigned short fan_module_presence_mask_offset[FAN_MODULE_NUM] = { 0x8a, 0x8a, 0x8a, 0x8a};
module_param_array(fan_module_presence_mask_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(fan_module_presence_mask_offset, "Module mask offsets vector (default)");
static unsigned short fan_module_bit[FAN_MODULE_NUM] = { 0, 1, 2, 3};
module_param_array(fan_module_bit, ushort, NULL, 0644);
MODULE_PARM_DESC(fan_module_bit, "FAN module bit vector (default)");
static unsigned short version_offset[CPLD_NUM] = { 0, 1, 2 };
module_param_array(version_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(version_offset, "CPLD version vector (default)");
static unsigned short exec_id = 0;
module_param(exec_id, ushort, 0);
MODULE_PARM_DESC(exec_id, "FAN and LED exec Id (default) 0");
static char *fan_eeprom_driver = "24c32";
module_param(fan_eeprom_driver, charp, 0);
MODULE_PARM_DESC(fan_eeprom_driver, "FAN EEPROM driver name (default is eeprom)");
static unsigned short fan_eeprom_mux[FAN_MODULE_NUM] = { 11, 12, 13, 14 };
module_param_array(fan_eeprom_mux, ushort, NULL, 0644);
MODULE_PARM_DESC(fan_eeprom_mux, "FAN EEPROM mux vector (default 11, 12, 13, 14)");
static unsigned short fan_eeprom_addr[FAN_MODULE_NUM] = { 0x50, 0x50, 0x50, 0x50 };
module_param_array(fan_eeprom_addr, ushort, NULL, 0644);
MODULE_PARM_DESC(fan_eeprom_addr, "FAN EEPROM address vector (default 0x50, 0x50, 0x50, 0x50)");
static char *psu_eeprom_driver = "24c02";
module_param(psu_eeprom_driver, charp, 0);
MODULE_PARM_DESC(psu_eeprom_driver, "PSU EEPROM driver name (default is eeprom)");
static char *psu_control_driver = "pmbus";
module_param(psu_control_driver, charp, 0);
MODULE_PARM_DESC(psu_control_driver, "PSU control driver name (default is eeprom)");
static unsigned short psu_mux[PSU_MODULE_NUM] = { 10, 10 };
module_param_array(psu_mux, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_mux, "FAN EEPROM mux vector (default 10, 10)");
static unsigned short psu_control_addr[PSU_MODULE_NUM] = { 0x59, 0x58 };
module_param_array(psu_control_addr, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_control_addr, "PSU EEPROM address vector (default 0x59, 0x58)");
static unsigned short psu_eeprom_addr[PSU_MODULE_NUM] = { 0x51, 0x50 };
module_param_array(psu_eeprom_addr, ushort, NULL, 0644);
MODULE_PARM_DESC(psu_eeprom_addr, "PSU EEPROM address vector (default 0x51, 0x50)");
MODULE_PARM_DESC(mux_driver, "MUX driver name (default is eeprom)");
static char *mux_driver = "cpld_mux_tor";
module_param(mux_driver, charp, 0);
static unsigned short parent_mux[MUX_NUM] = { 1, 1};
module_param_array(parent_mux, ushort, NULL, 0644);
MODULE_PARM_DESC(parent_mux, "BUS/MUX where MUX device is attached (default 1, 1)");
static unsigned short mux_first_num[MUX_NUM] = { 2, 10};
module_param_array(mux_first_num, ushort, NULL, 0644);
MODULE_PARM_DESC(mux_first_num, "The first channel on MUX device (default 2, 9)");
static unsigned short mux_chan_num[MUX_NUM] = { 8, 8};
module_param_array(mux_chan_num, ushort, NULL, 0644);
MODULE_PARM_DESC(mux_chan_num, "Number of channels per MUX device (default 8, 8)");
static unsigned short mux_reg_offset[MUX_NUM] = { 0x25db, 0x25da};
module_param_array(mux_reg_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(mux_reg_offset, "MUX control register offset vector (default 0x25db, 0x25da)");
static unsigned short deselect_on_exit = 1;
module_param(deselect_on_exit, ushort, 0);
MODULE_PARM_DESC(deselect_on_exit, "MUX deselect on exxit (default) 1");
static unsigned short force_chan = 0;
module_param(force_chan, ushort, 0);
MODULE_PARM_DESC(force_chan, "Force MUX start channel id (default) 0");
static unsigned short default_fan_speed = 60;
module_param(default_fan_speed, ushort, 0);
MODULE_PARM_DESC(default_fan_speed, "Deafault FAN speed in percents (default) 60");
static unsigned short cpld_lpc_base = 0x2500;
module_param(cpld_lpc_base, ushort, 0);
MODULE_PARM_DESC(cpld_lpc_base, "CPLD LPC base address (default 0x2500)");
static unsigned short cpld_lpc_size = 0x100;
module_param(cpld_lpc_size, ushort, 0);
MODULE_PARM_DESC(cpld_lpc_size, "CPLD LPC IO size (default 0x100)");
static unsigned short irq_line = DEF_IRQ_LINE;
module_param(irq_line, ushort, 0);
MODULE_PARM_DESC(irq_line, "CPU IRQ line");
static unsigned short num_wp_regs = 4;
module_param(num_wp_regs, ushort, 0);
MODULE_PARM_DESC(num_wp_regs, "Number of write protected registers, default is 4");
static unsigned short wp_reg_offset[WP_REG_NUM] = { 0x2e, 0x31, 0x18, 0x1a };
module_param_array(wp_reg_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(wp_reg_offset, "Write protected register offsets vector (default)");
static unsigned short num_init_regs = 2;
module_param(num_init_regs, ushort, 0);
MODULE_PARM_DESC(num_init_regs, "Number of init registers, default is 2");
static unsigned short init_reg_offset[INIT_REG_NUM] = { 0x2f, 0x33 };
module_param_array(init_reg_offset, ushort, NULL, 0644);
MODULE_PARM_DESC(init_reg_offset, "Init register offsets vector (default)");
static unsigned short init_reg_mask[INIT_REG_NUM] = { 0xbf, 0xbf };
module_param_array(init_reg_mask, ushort, NULL, 0644);
MODULE_PARM_DESC(init_reg_mask, "Init register masks vector (default)");
static unsigned short platform_reset_offset = 0x17;
module_param(platform_reset_offset, ushort, 0);
MODULE_PARM_DESC(platform_reset_offsets, "Platfrom reset register offset, default is 0x19");
static unsigned short platform_reset_bit = 0;
module_param(platform_reset_bit, ushort, 0);
MODULE_PARM_DESC(platform_reset_bit, "Platfrom reset register bit, default is 0x0");
static unsigned short pcie_slot_reset_offset = 0x17;
module_param(pcie_slot_reset_offset, ushort, 0);
MODULE_PARM_DESC(pcie_slot_reset_offsets, "PCIe slot reset register offset, default is 0x19");
static unsigned short pcie_slot_reset_bit = 1;
module_param(pcie_slot_reset_bit, ushort, 0);
MODULE_PARM_DESC(pcie_slot_reset_bit, "PCIe slot reset register bit, default is 0x1");
static unsigned short switch_brd_reset_offset = 0x17;
module_param(switch_brd_reset_offset, ushort, 0);
MODULE_PARM_DESC(switch_brd_reset_offsets, "Switch board reset register offset, default is 0x19");
static unsigned short switch_brd_reset_bit = 2;
module_param(switch_brd_reset_bit, ushort, 0);
MODULE_PARM_DESC(switch_brd_reset_bit, "Switch board reset register bit, default is 0x2");
static unsigned short asic_reset_offset = 0x19;
module_param(asic_reset_offset, ushort, 0);
MODULE_PARM_DESC(asic_reset_offsets, "ASIC reset register offset, default is 0x19");
static unsigned short asic_reset_bit = 3;
module_param(asic_reset_bit, ushort, 0);
MODULE_PARM_DESC(asic_reset_bit, "ASIC reset register bit, default is 0x3");
static unsigned short sys_pwr_cycle_offset = 0x30;
module_param(sys_pwr_cycle_offset, ushort, 0);
MODULE_PARM_DESC(sys_pwr_cycle_offsets, "System power cycle register offset, default is 0x30");
static unsigned short sys_pwr_cycle_bit = 2;
module_param(sys_pwr_cycle_bit, ushort, 0);
MODULE_PARM_DESC(sys_pwr_cycle_bit, "System power cycle register bit, default is 0x2");
static unsigned short sys_reset_cause_offset = 0x1d;
module_param(sys_reset_cause_offset, ushort, 0);
MODULE_PARM_DESC(sys_reset_cause_offset, "System reset cause register offset, default is 0x1d");
static unsigned short top_aggregation_status_offset = 0x3a;
module_param(top_aggregation_status_offset, ushort, 0);
MODULE_PARM_DESC(top_aggregation_status_offset, "top aggregation status register offset (default 0x3a)");
static unsigned short top_aggregation_mask_offset = 0x3b;
module_param(top_aggregation_mask_offset, ushort, 0);
MODULE_PARM_DESC(top_aggregation_mask_offset, "top aggregation mask register offset (default 0x3b)");
static unsigned short top_aggregation_mask = 0x4f;
module_param(top_aggregation_mask, ushort, 0);
MODULE_PARM_DESC(top_aggregation_mask_offset, "top aggregation mask register (default 0x4f)");
int (*mlnx_set_fan_hook)(u8 asic_id, u8 id, u8 speed) = NULL;
EXPORT_SYMBOL(mlnx_set_fan_hook);
static int bus_access_func(struct cpld_data *cplddata,
u8 from_range,
u8 to_range,
u8 rw_flag,
u8 *data,
u8 lock_flag)
{
int datalen = to_range - from_range + 1;
if (lock_flag)
mutex_lock(&cplddata->access_lock);
bus_rw(cplddata->base, from_range, datalen, rw_flag, data);
if (lock_flag)
mutex_unlock(&cplddata->access_lock);
return 0;
}
static inline int handle_mask_read_entry_point(struct cpld_data *cplddata,
struct module_params *status,
struct module_params *mask,
u8 *status_cache,
u8 *mask_cache,
u8 item_num,
event_type_t event)
{
u8 err = 0, data = 0, bit_mask, i, j;
if (*mask_cache == 0)
return 0;
/* Mask event */
bus_access_func(cplddata,
mask->offset,
mask->offset,
0, &data, 0);
/* Read status */
bus_access_func(cplddata,
status->offset,
status->offset,
1, &data, 0);
switch (event) {
case psu_event:
case fan_event:
data = (~(data) & *mask_cache);
break;
default:
data = (data & *mask_cache);
break;
}
bit_mask = (*status_cache) ^ data;
*status_cache = data;
if (!bit_mask)
return err;
for (i = 0, j = 1; i <= 7; i++) {
if (bit_mask & j) {
switch (event) {
case psu_event:
err = cplddata->exec_tab.psu_exec_entry(cplddata, i, (bit_mask & data), 0, event);
break;
case power_event:
err = cplddata->exec_tab.psu_exec_entry(cplddata, i, (bit_mask & data), 0, event);
break;
case fan_event:
err = cplddata->exec_tab.fan_exec_entry(cplddata, i, (bit_mask & data), 0, event);
break;
case psu_alarm:
case no_event:
break;
}
}
j = j << 1;
}
return err;
}
static inline int handle_clear_unmask_entry_point(struct cpld_data *cplddata,
struct module_params *event,
struct module_params *mask,
u8 *mask_cache,
u8 *event_cache)
{
u8 err = 0, data = 0;
/* clear event */
bus_access_func(cplddata,
event->offset,
event->offset,
0, &data, 0);
/* unmask event */
bus_access_func(cplddata,
mask->offset,
mask->offset,
0, mask_cache, 0);
return err;
}
static inline int clear_unmask(struct cpld_data *cplddata,
u8 unmask_psu,
u8 unmask_fan)
{
u8 id = 0, event_clear = 0;
handle_clear_unmask_entry_point(cplddata,
&cplddata->cfg_psu_module.module[id].power_event,
&cplddata->cfg_psu_module.module[id].power_mask,
&unmask_psu, &event_clear);
handle_clear_unmask_entry_point(cplddata,
&cplddata->cfg_psu_module.module[id].alarm_event,
&cplddata->cfg_psu_module.module[id].alarm_mask,
&unmask_psu, &event_clear);
handle_clear_unmask_entry_point(cplddata,
&cplddata->cfg_psu_module.module[id].presence_event,
&cplddata->cfg_psu_module.module[id].presence_mask,
&unmask_psu, &event_clear);
handle_clear_unmask_entry_point(cplddata,
&cplddata->cfg_fan_module.module[id].presence_event,
&cplddata->cfg_fan_module.module[id].presence_mask,
&unmask_fan, &event_clear);
bus_access_func(cplddata,
cplddata->top_aggregation_mask.offset,
cplddata->top_aggregation_mask.offset,
0, &cplddata->top_aggregation_mask.bit, 1);
return 0;
}
static inline int mask_read(struct cpld_data *cplddata,
u8 mask_psu,
u8 mask_fan)
{
u8 id = 0;
u8 data = 0, mask_aggregation = 0;
bus_access_func(cplddata,
cplddata->top_aggregation_status.offset,
cplddata->top_aggregation_status.offset,
1, &data, 1);
if (cplddata->top_aggregation_cache == data)
return 1;
cplddata->top_aggregation_cache = data;
bus_access_func(cplddata,
cplddata->top_aggregation_status.offset,
cplddata->top_aggregation_status.offset,
0, &mask_aggregation, 1);
handle_mask_read_entry_point(cplddata,
&cplddata->cfg_psu_module.module[id].power_status,
&cplddata->cfg_psu_module.module[id].power_mask,
&cplddata->cfg_psu_module.power_status_cache,
&cplddata->cfg_psu_module.mask,
cplddata->cfg_psu_module.num_psu_modules,
power_event);
handle_mask_read_entry_point(cplddata,
&cplddata->cfg_psu_module.module[id].alarm_status,
&cplddata->cfg_psu_module.module[id].alarm_mask,
&cplddata->cfg_psu_module.alarm_status_cache,
&cplddata->cfg_psu_module.mask,
cplddata->cfg_psu_module.num_psu_modules,
psu_alarm);
handle_mask_read_entry_point(cplddata,
&cplddata->cfg_psu_module.module[id].presence_status,
&cplddata->cfg_psu_module.module[id].presence_mask,
&cplddata->cfg_psu_module.presence_status_cache,
&cplddata->cfg_psu_module.mask,
cplddata->cfg_psu_module.num_psu_modules,
psu_event);
handle_mask_read_entry_point(cplddata,
&cplddata->cfg_fan_module.module[id].presence_status,
&cplddata->cfg_fan_module.module[id].presence_mask,
&cplddata->cfg_fan_module.presence_status_cache,
&cplddata->cfg_fan_module.mask,
cplddata->cfg_fan_module.num_fan_modules,
fan_event);
return 0;
}
typedef enum led_attr {
led_color,
led_name,
led_cap,