[RISCV] Implement XCValu Intrinsics #70
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
realqhc
changed the title
melonedo
reviewed
Jul 28, 2023
| } | ||
| const MCInstrDesc &Desc = TII->get(Opcode); | ||
| BuildMI(MBB, MBBI, DL, Desc, DstReg). | ||
| addReg(I). |
There was a problem hiding this comment.
Probably .addReg(I) instead of addReg(I).?
|
Looks good, should remember when we come to implement the Clang side of this that it would be nice to have Clang do verification on |
Implement XcvAlu LLVM intrinsics. Spec: https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md
|
Could someone with write access merge this, I think a bug should be opened with Lewis' comment afterwards as a reminder for however this is used in Clang (possibly part of #74 discussion?) |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Implement XcvAlu LLVM intrinsics.
Spec: https://github.com/openhwgroup/cv32e40p/blob/62bec66b36182215e18c9cf10f723567e23878e9/docs/source/instruction_set_extensions.rst