How to accessing LPDD4 in bare meatal application with ICICLE kit

[AllenChang2]

I have enabled the LPDD4 in MSS configurator.
I have tried to use bare metal application to access LPDDR4.
I found I only can access LPDDR4 by using de-bug mode (LIM).
If I program the application to eNVM and use boot mode1 , the application is not work.

I tried to use the XML file without DDR4 and program to eNVM then the application can work except DDR4 accessing.
My thinking is the MSS fail at DDR training due to the IO calibration is not finished.
Now I do not have idea how to make this application work in release mode (eNVM).

Thanks
Allen

[hughbreslin]

Hi @AllenChang2 what version of the MSS configurator are you using? If you used 2022.2 did you overwrite the 2 default settings that are mentioned in the Icicle Kit Reference Design readme? These defaults will be updated in the 2022.3 configurator. You can use the MSS configuration file from the Icicle Kit Reference Design as a base to generate a config too which may be easier than starting from scratch.

[AllenChang2]

Hi Hugh

I am using mpfs-gpio_interrupt as the base.
I have opened the DDR debug message by #define DEBUG_DDR_INIT and #define DEBUG_DDR_DDRCFG.
It shows the de-bug mode can pass DDR test but release mode is stuck at loading DDR patterns.

Thanks
Allen

[hughbreslin]

Hi Allen, sorry for the delay in getting back!

Are you still facing this issue? My best suggestion at the moment is try with one of the base bare metal project configurations (with the provided XML) and see if that is working. Then modify the reference MSS configuration from the Icicle Kit Reference Design to match the peripherals you would like enabled and see if that works. If it fails re-enable peripherals one at a time until you can see what is causing the issue.

From my understanding the only difference should be the peripheral configuration you have which shouldn't affect DDR but it seems to be.

[AllenChang2]

Hi Hugh

Yes, I still have the issue.
I have tried to open MSS configurator 2022.2 to edit my original .cfg file but the result is the same.
I will continue to try it.

Thanks
Allen

[AllenChang2]

Hi Hugh

I have done some experiments.
The root cause is XML file issue.
Once the XML file is generated correctly, the application can be programmed to eNVM and boot successfully.

1. Using MSS configurator 2022.1 -> fail at loading DDR test pattern
2. Using MSS configurator 2022.1 & modify DDR setting DQ ODT =80, calibration point VDDQ/2.5 -> fail at loading DDR test pattern
3. Open .cfg file (created by 2022.1) by MSS configurator 2022.2 & modify DDR setting DQ ODT =80, calibration point VDDQ/2.5 -> fail
   at loading DDR test pattern
4. Using MSS configurator 2022.2 -> fail at loading DDR test pattern
5. Using MSS configurator 2022.2 & modify DDR setting DQ ODT =80, calibration point VDDQ/2.5 -> boot successfully

[hughbreslin]

Ahh ok, I'm not sure of the full differences between the 2022.1 and 2022.2 DDR defaults but there were updates for 2022.2. I'm glad its resolved.