{"payload":{"header_redesign_enabled":false,"results":[{"id":"299313504","archived":false,"color":"#f34b7d","followers":11,"has_funding_file":false,"hl_name":"pc2/StencilStream","hl_trunc_description":"SYCL-based Stencil Simulation Framework Targeting FPGAs","language":"C++","mirror":false,"owned_by_organization":true,"public":true,"repo":{"repository":{"id":299313504,"name":"StencilStream","owner_id":129163,"owner_login":"pc2","updated_at":"2024-08-31T09:14:54.328Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":90,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Apc2%252FStencilStream%2B%2Blanguage%253AC%252B%252B","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/pc2/StencilStream/star":{"post":"arSAPfl_EYbvzkSRT3gxJBiSwoIZAuVAQ8zIs2quhv-0BjHj6RXXCV968gk-yTUkIQCIGZP4v0XgN2-POyn23w"},"/pc2/StencilStream/unstar":{"post":"28doInrOQWUuLGLqbpQg_0MrUm3xIxamFB-FLvSNgXfrM_va9j15CDv03uqlo_v2CPcho4_jQMoDUss4Y4_Oxg"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"DdwyClt3TaJ1oKfevEFKuefeGxYXG0Fsv42HPZLdmniMIQvr53q7TewLtVRtvSKWIf-hDnXpcBf-CoPz0lD2ZA"}}},"title":"Repository search results"}