The HiFive Unleashed Platform™ is purpose-built to emulate most of the functionality of the upcoming
PolarFire SoC FPGA, which will be the industry’s first RISC-V based FPGA SoC.
This guide describes the MPFS-DEV-KIT, board setup, and the process for booting Linux on the HiFive Unleashed platform.
The HiFive Unleashed Platform consists of the SiFive’s HiFive Unleashed kit and Microsemi’s HiFive Unleashed Expansion kit with their respective accessories. Microsemi's HiFive Unleashed Expansion board enables users to create a Linux system running on a RISC-V core complex, with a large FPGA fabric accessible through the memory map. The expansion board is shipped with a pre-configured bitstream enabling PCIe root port functionality.
- One SiFive's HiFive Unleashed board
- One power wall adapter 12 V
- One USB-A to micro USB-B cable
- HiFive Unleashed Expansion Kit
- One Microsemi's HiFive Unleashed Expansion Board
- One USB-A to micro USB-B cable
- One 12 V, AC power adapter and cord
- One FlashPro4/FlashPro5 programming dongle
SiFive’s HiFive Unleashed development kit is based on the Freedom U540-C000 chip, the first 4+1 multicore RISC-V Linux-capable SoC.
- 8 GB DDR4 with ECC
- Gigabit Ethernet port
- 32 MB quad SPI flash from ISSI
- MicroSD card for removable storage
- FMC connector for future expansion
The HiFive Unleashed Expansion board contains the following items:
- 300K LE PolarFire FPGA in an FCG1152 package (MPF300TS-1FCG1152EES)
- 24-lane PCIe switch
- eMMC Nand Flash, uSD card slot
- USB to Uart bridges
- 4 Gbit DDR4 x16
- PCI Express x1 card connector
- PCI Express x16 card connector with x4 lane support
- SPI Flash for FPGA remote updates, QSPI Flash connected to GPIO
- FMC connection to HFU540-4A00 kit
- SSD M.2 connector
- SATA connector
Download and install the following development tools in the PC in order to design, simulate, and debug on the HiFive Unleashed Platform (MPFS-DEV-KIT).
The Microsemi FlashPro programming system is a combination of Microsemi's FlashPro software and a hardware programmer. Together, they provide in-system programming (ISP) for all FPGA families. The required programming and debug software is integrated with the Libero SoC PolarFire software. This software is also available as a standalone programmer for production programming. Visit Microsemi's FlashPro page to download the standalone programmer (if needed).
| Software | Description | Hardware | Description |
|---|---|---|---|
| FP Express | Software for Windows and Linux | FlashPro5 | Hardware programmer for Windows and Linux |
| FlashPro | Software for Windows | FlashPro4 | Hardware programmer for Windows |
The following table contains links to the .stp file, .job file and schematic for each release.
| Revision | .stp | .job | Schematic |
|---|---|---|---|
| Initial release | .stp | .job | Schematic |
| Second release | .stp Second Release | .job Second Release | Schematic |
The Linux image for the HiFive Unleashed Platform can be built using either the Buildroot or Yocto build systems. The table below contains links to these build systems.
| Build System | Location |
|---|---|
| Buildroot | Polarfire SoC Buildroot SDK |
| Yocto | Polarfire SoC Yocto SDK |
The Polarfire SoC Buildroot SDK is based on the SiFive freedom-u-sdk with modifications to the device tree to support the HiFive Unleashed Expansion board. It also includes drivers for Microsemi PCIe, I2C, SPI, MMUART, and GPIO peripherals. See the build systems table above to download the Polarfire SoC Buildroot SDK. The build procedure is described in the Linux build system's README.
Follow the instructions to set up the HiFive Unleashed board:
-
Switch off the power button (red button in the following figure) on the HiFive Unleashed board. Ensure the fan is plugged in.
-
Set all pins in the DIP-switch block to the LEFT. The ON position=0; therefore, this sets MSEL to mode 1111. See the boot modes table in Section 4 of the HiFive Unleashed Getting Started Guide for more information on MSEL.
-
Insert an SD-card programmed with the bootloader and Linux. See the Linux build instructions in the Builroot/Yocto top level README for details on creating the content of this SD card.
-
If available, connect the board to a network switch. The board will run DHCP on boot and start an ssh server. The MAC address is 70:b3:d5:92:fX:XX, where X:XX is replaced by the board number converted to hexadecimal. For example, if the board is H5U-00063, then the last digits of the MAC address are 0:3f.
-
Connect the board through USB to the host PC. The USB connector has two serial interfaces: the first contains the Linux console running at 115200 baud and the second provides JTAG suitable for use with OpenOCD.
-
On the HiFive Unleashed Expansion board, update the PolarFire FPGA with the FPGA bitstream provided. See the Software Installation and Configuration section for steps to program the FPGA.
-
The HiFive Unleashed platform is now configured as seen in the FPGA Design in Libero section.
-
Plug-in the HiFive Unleashed board to the HiFive Unleashed Expansion board on the FMC connector. Push the power button ON on the HiFive Unleashed board. Note: Do not connect the power supply to the HiFive Unleashed board.
-
Connect the power supply to the HiFive Unleashed Expansion board in order to power the HiFive Unleashed board.
-
Slide the HiFive Unleashed Expansion board’s power switch (SW3) on. Boot messages should now appear on the console in the host PC.
-
After 30 seconds, an LED should begin to regularly blink a heartbeat on the HiFive Unleashed board.
The following steps explain the procedure to download the FPGA bitstream onto the PolarFire FPGA.
To program the PolarFire device with the .stp programming file (using FlashPro in Windows environment), perform the following steps. The link to the .stp file is given in Firmware Versions.
- Ensure that the jumper settings on the board are the same as those listed in Jumper Settings. Note: The power supply switch must be switched off while making the jumper connections.
- Connect the power supply cable to the J3 connector on the board.
- Connect the FlashPro4 to a PC USB port and to the connector J24 (FP4 header) of the HiFive Unleashed Expansion board.
- Power on the board using the SW3 slide switch.
- On the host PC, launch the FlashPro software.
- Click
New Projectto create a new project. In theNew Projectwindow, enter a project name. - Click
Browseand navigate to the location where you want to save the project. - Select
Single Deviceas the programming mode and clickOKto save the project. - Click
Configure Device. - Click
Browse, and navigate to the location where theHFU540_EXP_Bitstream_r20101.stpfile is located and select the file. - Click
Open. The required programming file is selected and ready to be programmed in the device. - Click
PROGRAMto program the device. When the device is programmed successfully, a Run PASSED status is displayed.
See the FlashPro User Guide for more information.
To program the PolarFire device with the .job programming file (using FlashPro5 programmer in Linux environment), perform the following steps. The link to the .job file can be found in Firmware Versions.
- Ensure that the jumper settings on the board are the same as those listed in Jumper Settings. Note: The power supply switch must be switched off while making the jumper connections.
- Connect the power supply cable to the J3 connector on the board.
- Connect the FlashPro5 to a PC USB port and to the connector J24 (FP4 header) of the HiFive Unleashed Expansion board.
- Power on the board using the SW3 slide switch.
- On the host PC, launch the FlashPro Express (FP Express) software.
- From the Project menu, choose Create Job Project from Programming Job.
- Click Browse to load the Programming Job File HFU540_EXP_Bitstream_r20102.job, and specify your FlashPro Express job project location. Click OK to continue.
- Save the FlashPro Express job project.
- Set the Programming Action in the dropdown menu to PROGRAM.
- Click RUN. Detailed individual programmer and device status information appears in the
Programmer List. Your programmer status (PASSED or FAILED) appears in theProgrammer StatusBar.
See the FlashPro Express User Guide for more information.
| Switch | Ref | Section | Description | Definition | Default |
|---|---|---|---|---|---|
| 1 | SW3 | Power switch | Sliding switch for 12 V input | Open: DC adaptor 12 V is not connected to the board power | Open |
| Closed: DC adaptor 12 V is connected to board power supplies | |||||
| 2 | SW5 | PCIe switch (Switchtec) | Selection of Normal/Boot Recovery mode for PCIe switch | 0: Boot recovery mode | 1–2: Normal mode |
| 1: Normal mode | |||||
| 3 | J25 | SATA controller | Between SPI flash output to input of PCIe to SATA controller | Open: SPI flash o/p is not connected to PCIe to SATA controller | Close |
| Close: SPI flash o/p is connected to PCIe to SATA controller | |||||
| 4 | J31 | USB instance 1 | VBUS source selection (onboard 5 V/USB connector) | Open: VBUS sourced by USB connector (Device mode) | Close |
| Close: On-board 5 V to USB CONN (Host mode) | |||||
| 6 | J27 | USB instance 2 | Configuring USB PHY (U60) as host/device | Open: USB3340 acts as device | Close |
| Close: USB3340 acts as host | |||||
| 7 | J30 | USB instance 2 | VBUS source selection (onboard 5 V/USB connector) | Open: VBUS sourced by USB connector (Device mode) | Close |
| Close: On-board 5 V to USB CONN (Host mode) | |||||
| 8 | J21 | SC-SPI | SC-SPI I/O configuration interface | Open: SC SPI acts as master | Close |
| Close: SC SPI acts as slave | |||||
| 9 | J22 | JTAG | Weak pull down to JTAG TRSTB | Open: 1K pull down connected to TRSTB | Open |
| Close: A 100k pull down connected in parallel to the default 1k pull down to TRSTB |
For instructions on how to build and load a Linux image, see the Linux build instructions in the Buildroot/Yocto top level README.
The Linux boot process can be observed by connecting a serial terminal to the USB port on the HiFive
Unleashed board. Settings are 115200 baud, 8 data bits, 1 stop bit, no parity, and no flow control.
The root password is “microchip” for Buildroot & Yocto mpfs-dev-cli. No password is set for Yocto core-image*. The console should look similar to the following figure.
The high-level block diagram for the Libero project implemented on the PolarFire FPGA is as seen in the following figure.
More IPs are being ported on the HiFive Unleashed Platform and will be made available on request.
The IPs ported on the PolarFire FPGA are accessible from the RISC-V U540 memory map as listed in the following table. The interrupt number 42 is used for all the peripherals.
| Peripherals | Mem Requirement | Start Address | End Address | Mem Allocation | Comments |
|---|---|---|---|---|---|
| PCIe | --- | --- | --- | --- | --- |
| PCIe Config Space | 256 MB | 0x2030000000 | 0x203fffffff | 256 MB | --- |
| PCIe Mem Space 32 | 512 MB | 0x0040000000 | 0x005fffffff | 512 MB | --- |
| PCIe Mem Space 64 | 2 GB | 0x2080000000 | 0x20ffffffff | 2048 MB | --- |
| PCIe APB Space | 1 MB | 0x2000000000 | 0x20000fffff | 1 MB | --- |
| Peripherals | --- | --- | --- | --- | --- |
| I2C_0 | 4 KB | 0x2000100000 | 0x2000100fff | 4095 KB | I2C0 header |
| Reserved | 4 KB | 0x2000101000 | 0x2000101fff | 4095 KB | Reserved |
| GPIO 4 KB | 0x2000103000 | 0x2000103fff | 4095 KB | GPIO Implementation | --- |
| MMUART_0 | 4 KB | 0x2000104000 | 0x2000104fff | 4095 KB | J36 |
| Reserved | 4 KB | 0x2000105000 | 0x2000105fff | 4095 KB | Reserved |
| Reserved | 4 KB | 0x2000106000 | 0x2000106fff | 4095 KB | Reserved |
| SPI_0 | 4 KB | 0x2000107000 | 0x2000107fff | 4095 KB | SPI0 header |
| Reserved | 4 KB | 0x2000108000 | 0x2000108fff | 4095 KB | Reserved |
| FIC (AXI) | 256 MB | 0x2010000000 | 0x201fffffff | 256 MB | To connect with user logic |
| free space | --- | 0x2020000000 | 0x202fffffff | 256 MB | --- |
The GPIO implemented in the design is pinned out as a starting point for your custom design implementation. The details of the GPIO pinout is listed in the following table:
| GPIO | Function |
|---|---|
| 0 | led4 |
| 1 | led5 |
| 2 | J2-pin13 |
| 3 | J2-pin14 |
| 4 | sw9 |
| 5 | sw10 |
| 6 | J2-pin9 |
| 7 | USB1 reset |
Visit the following links for further reference reading materials.
RISC-V User-level ISA Specification
RISC-V Draft Privileged ISA Specification
SiFive FU540-C000 User Manual
TU0844 Libero SoC PolarFire v2.2 Design Flow Tutorial
HiFive Unleashed Getting Started Guide
PolarFire FPGA Documentation
Libero SoC PolarFire Documentation
FlashPro User Guide for PolarFire
FlashPro Express User Guide for PolarFire
PolarFire SoC Information
Schematics of MPFS-DEV-KIT
For technical queries, visit the Microsemi SoC Customer Portal, select “PolarFire SoC” under Product Family, “MPFSXXXX” under Device Family and type in the query. Microchip’s technical support team will create a ticket, address the query and track it to completion.