From 9a90fa26d67d225ab97ddd28b81d017cbd85a750 Mon Sep 17 00:00:00 2001
From: Tim Fischer <fischeti@iis.ee.ethz.ch>
Date: Wed, 18 Sep 2024 11:40:41 +0200
Subject: [PATCH] ci: Debug

---
 .gitlab-ci.yml | 19 +++++++------------
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index e602d38d..985737e8 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -38,16 +38,6 @@ compile-vsim:
       - work/
       - modelsim.ini
 
-install-floogen:
-  stage: build
-  script:
-    - $PYTHON -m venv .venv
-    - source .venv/bin/activate
-    - pip install .
-  artifacts:
-    paths:
-      - .venv/
-
 run-vsim:
   stage: run
   script:
@@ -80,13 +70,18 @@ run-traffic:
         TRAFFIC_RW: [read, write]
   needs:
     - collect-bender-sources
-    - install-floogen
   script:
+    # Install `floogen`
+    - $PYTHON -m venv .venv
     - source .venv/bin/activate
+    - pip install .
+    # Generate sources
     - floogen -c floogen/examples/${DUT}_${ROUTE_ALGO}.yml -o generated --no-format
-    - make compile-sim EXTRA_BENDER_FLAGS="-t ${DUT}"
     - make jobs
+    # Compile and run the simulation
+    - make compile-sim EXTRA_BENDER_FLAGS="-t ${DUT}"
     - make run-sim-batch VSIM_TB_DUT=tb_floo_${DUT} | tee vsim.log 2>&1
+    # Check for errors
     - 'grep "Errors: 0," vsim.log'
 
 morty: