wip: Floo macros #622
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (6)
hw/tb/tb_floo_nw_chimney.sv|11 col 8| Declared module does not match the first dot-delimited component of file name: "tb_floo_nw_chimney" [Style: file-names] [module-filename]
hw/floo_nw_vc_chimney.sv|14 col 8| Declared module does not match the first dot-delimited component of file name: "floo_nw_vc_chimney" [Style: file-names] [module-filename]
hw/floo_pkg.sv|158 col 5| Explicitly define a default case for every case statement or add unique qualifier to the case statement. [Style: case-statements] [case-missing-default]
hw/floo_pkg.sv|168 col 5| Explicitly define a default case for every case statement or add unique qualifier to the case statement. [Style: case-statements] [case-missing-default]
hw/floo_pkg.sv|194 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
hw/floo_pkg.sv|211 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
Filtered Findings (0)
Annotations
Check warning on line 11 in hw/tb/tb_floo_nw_chimney.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/tb/tb_floo_nw_chimney.sv#L11
Declared module does not match the first dot-delimited component of file name: "tb_floo_nw_chimney" [Style: file-names] [module-filename]
Raw output
message:"Declared module does not match the first dot-delimited component of file name: \"tb_floo_nw_chimney\" [Style: file-names] [module-filename]" location:{path:"./hw/tb/tb_floo_nw_chimney.sv" range:{start:{line:11 column:8}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:11 column:8} end:{line:12}} text:"module tb_floo_nw_chimney;\n"}
Check warning on line 14 in hw/floo_nw_vc_chimney.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/floo_nw_vc_chimney.sv#L14
Declared module does not match the first dot-delimited component of file name: "floo_nw_vc_chimney" [Style: file-names] [module-filename]
Raw output
message:"Declared module does not match the first dot-delimited component of file name: \"floo_nw_vc_chimney\" [Style: file-names] [module-filename]" location:{path:"./hw/floo_nw_vc_chimney.sv" range:{start:{line:14 column:8}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:14 column:8} end:{line:15}} text:"module floo_nw_vc_chimney #(\n"}
Check warning on line 158 in hw/floo_pkg.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/floo_pkg.sv#L158
Explicitly define a default case for every case statement or add `unique` qualifier to the case statement. [Style: case-statements] [case-missing-default]
Raw output
message:"Explicitly define a default case for every case statement or add `unique` qualifier to the case statement. [Style: case-statements] [case-missing-default]" location:{path:"./hw/floo_pkg.sv" range:{start:{line:158 column:5}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 168 in hw/floo_pkg.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/floo_pkg.sv#L168
Explicitly define a default case for every case statement or add `unique` qualifier to the case statement. [Style: case-statements] [case-missing-default]
Raw output
message:"Explicitly define a default case for every case statement or add `unique` qualifier to the case statement. [Style: case-statements] [case-missing-default]" location:{path:"./hw/floo_pkg.sv" range:{start:{line:168 column:5}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 194 in hw/floo_pkg.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/floo_pkg.sv#L194
Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]" location:{path:"./hw/floo_pkg.sv" range:{start:{line:194 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 211 in hw/floo_pkg.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/floo_pkg.sv#L211
Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]" location:{path:"./hw/floo_pkg.sv" range:{start:{line:211 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}