From fb5605db994162c8282d871de3f6a5f0536cb38f Mon Sep 17 00:00:00 2001
From: Zexin Fu <zexifu@iis.ee.ethz.ch>
Date: Wed, 18 Dec 2024 18:53:04 +0100
Subject: [PATCH] Add a timing cut in the amo_resp path for better timing.

---
 core/cva6.sv | 31 +++++++++++++++++++++++++++++--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/core/cva6.sv b/core/cva6.sv
index e34dc9f36f..489f5ae61c 100644
--- a/core/cva6.sv
+++ b/core/cva6.sv
@@ -1393,6 +1393,8 @@ module cva6
         .inval_ready_o     (inval_ready)
     );
   end else if (CVA6Cfg.DCacheType == config_pkg::HPDCACHE) begin : gen_cache_hpd
+    amo_req_t  amo_req_masked;
+    amo_resp_t amo_resp_precut;
     cva6_hpdcache_subsystem #(
         .CVA6Cfg   (CVA6Cfg),
         .icache_areq_t(icache_areq_t),
@@ -1430,8 +1432,8 @@ module cva6
         .dcache_flush_ack_o(dcache_flush_ack_cache_ctrl),
         .dcache_miss_o     (dcache_miss_cache_perf),
 
-        .dcache_amo_req_i (amo_req),
-        .dcache_amo_resp_o(amo_resp),
+        .dcache_amo_req_i (amo_req_masked),
+        .dcache_amo_resp_o(amo_resp_precut),
 
         .dcache_cmo_req_i ('0  /*FIXME*/),
         .dcache_cmo_resp_o(  /*FIXME*/),
@@ -1457,6 +1459,31 @@ module cva6
         .noc_resp_i(noc_resp_i)
     );
     assign inval_ready = 1'b1;
+
+    // Mask the amo_req.req when amo_resp.ack is asserted, because
+    // at the next cycle when the amo_resp_precut.ack is assert, 
+    // the exe stage will get the ask from amo_resp and deassert
+    // the req at the next cycle
+    always_comb begin
+      amo_req_masked = amo_req;
+      amo_req_masked.req = amo_req.req & ~amo_resp.ack;
+    end
+
+    // a spill register for amo_resp, for timing optimization
+    spill_register #(
+        .T     (amo_resp_t),
+        .Bypass(0)
+    ) i_amo_resp (
+        .clk_i  (clk_i),
+        .rst_ni (rst_ni),
+        .valid_i(amo_resp_precut.ack),
+        .ready_o(),
+        .data_i (amo_resp_precut),
+        .valid_o(),
+        .ready_i(1'b1),
+        .data_o (amo_resp)
+    );
+
   end else begin : gen_cache_wb
     std_cache_subsystem #(
         // note: this only works with one cacheable region