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pcie2ram.qsys
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pcie2ram.qsys
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<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element clk_125
{
datum _sortIndex
{
value = "0";
type = "int";
}
}
element clk_125.clk
{
datum color
{
value = "-52378";
type = "int";
}
}
element clk_125.clk_reset
{
datum color
{
value = "-13408513";
type = "int";
}
}
element clk_125_out
{
datum _sortIndex
{
value = "1";
type = "int";
}
}
element pcie_hip
{
datum _sortIndex
{
value = "2";
type = "int";
}
}
element pcie_ram
{
datum _sortIndex
{
value = "4";
type = "int";
}
}
element pcie_ram.s1
{
datum baseAddress
{
value = "1114112";
type = "String";
}
}
element pcie_reconfig
{
datum _sortIndex
{
value = "3";
type = "int";
}
datum sopceditor_expanded
{
value = "1";
type = "boolean";
}
}
element sysid_qsys_0
{
datum _sortIndex
{
value = "5";
type = "int";
}
}
element sysid_qsys_0.control_slave
{
datum baseAddress
{
value = "1048576";
type = "String";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="5SGSMD5K1F40C1" />
<parameter name="deviceFamily" value="Stratix V" />
<parameter name="deviceSpeedGrade" value="1_H1" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
<parameter name="globalResetBus" value="false" />
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
<parameter name="maxAdditionalLatency" value="1" />
<parameter name="projectName" value="PCIeLedBlink.qpf" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="testBenchDutName" value="" />
<parameter name="timeStamp" value="0" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface name="clk" internal="clk_125.clk_in" type="clock" dir="end" />
<interface
name="clk_125"
internal="clk_125_out.out_clk"
type="clock"
dir="start" />
<interface name="hip_ctrl" internal="pcie_hip.hip_ctrl" type="conduit" dir="end" />
<interface name="hip_npor" internal="pcie_hip.npor" type="conduit" dir="end" />
<interface name="hip_refclk" internal="pcie_hip.refclk" type="clock" dir="end" />
<interface
name="hip_serial"
internal="pcie_hip.hip_serial"
type="conduit"
dir="end" />
<interface name="pcie_ram_bus" internal="pcie_ram.s2" type="avalon" dir="end" />
<interface name="pcie_ram_clk" internal="pcie_ram.clk2" type="clock" dir="end" />
<interface
name="pcie_ram_reset"
internal="pcie_ram.reset2"
type="reset"
dir="end" />
<interface name="reset" internal="clk_125.clk_in_reset" type="reset" dir="end" />
<module name="clk_125" kind="clock_source" version="20.1" enabled="1">
<parameter name="clockFrequency" value="1250000000" />
<parameter name="clockFrequencyKnown" value="true" />
<parameter name="inputClockFrequency" value="0" />
<parameter name="resetSynchronousEdges" value="NONE" />
</module>
<module
name="clk_125_out"
kind="altera_clock_bridge"
version="20.1"
enabled="1">
<parameter name="DERIVED_CLOCK_RATE" value="1250000000" />
<parameter name="EXPLICIT_CLOCK_RATE" value="125000000" />
<parameter name="NUM_CLOCK_OUTPUTS" value="1" />
</module>
<module
name="pcie_hip"
kind="altera_pcie_sv_hip_avmm"
version="20.1"
enabled="1">
<parameter name="AST_LITE" value="0" />
<parameter name="AVALON_ADDR_WIDTH" value="32" />
<parameter name="AddressPage">0\,1\,2\,3\,4\,5\,6\,7\,8\,9\,10\,11\,12\,13\,14\,15</parameter>
<parameter name="BYPASSS_A2P_TRANSLATION" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_0_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_0_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_10_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_10_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_11_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_11_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_12_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_12_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_13_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_13_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_14_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_14_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_15_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_15_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_1_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_1_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_2_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_2_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_3_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_3_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_4_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_4_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_5_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_5_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_6_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_6_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_7_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_7_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_8_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_8_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_9_HIGH" value="0" />
<parameter name="CB_A2P_ADDR_MAP_FIXED_TABLE_9_LOW" value="0" />
<parameter name="CB_A2P_ADDR_MAP_IS_FIXED" value="0" />
<parameter name="CB_A2P_ADDR_MAP_NUM_ENTRIES" value="2" />
<parameter name="CB_A2P_ADDR_MAP_PASS_THRU_BITS" value="20" />
<parameter name="CB_P2A_AVALON_ADDR_B0" value="0x00000000" />
<parameter name="CB_P2A_AVALON_ADDR_B1" value="0x00000000" />
<parameter name="CB_P2A_AVALON_ADDR_B2" value="0x00000000" />
<parameter name="CB_P2A_AVALON_ADDR_B3" value="0x00000000" />
<parameter name="CB_P2A_AVALON_ADDR_B4" value="0x00000000" />
<parameter name="CB_P2A_AVALON_ADDR_B5" value="0x00000000" />
<parameter name="CB_P2A_FIXED_AVALON_ADDR_B0" value="0" />
<parameter name="CB_P2A_FIXED_AVALON_ADDR_B1" value="0" />
<parameter name="CB_P2A_FIXED_AVALON_ADDR_B2" value="0" />
<parameter name="CB_P2A_FIXED_AVALON_ADDR_B3" value="0" />
<parameter name="CB_P2A_FIXED_AVALON_ADDR_B4" value="0" />
<parameter name="CB_P2A_FIXED_AVALON_ADDR_B5" value="0" />
<parameter name="CB_PCIE_MODE" value="1" />
<parameter name="CB_PCIE_RX_LITE" value="0" />
<parameter name="CB_RP_S_ADDR_WIDTH" value="32" />
<parameter name="CG_COMMON_CLOCK_MODE" value="1" />
<parameter name="CG_ENABLE_A2P_INTERRUPT" value="0" />
<parameter name="CG_ENABLE_ADVANCED_INTERRUPT" value="0" />
<parameter name="CG_ENABLE_HIP_STATUS" value="1" />
<parameter name="CG_ENABLE_HIP_STATUS_EXTENSION" value="0" />
<parameter name="CG_IMPL_CRA_AV_SLAVE_PORT" value="0" />
<parameter name="CG_RXM_IRQ_NUM" value="16" />
<parameter name="INTENDED_DEVICE_FAMILY" value="Stratix V" />
<parameter name="NUM_PREFETCH_MASTERS" value="1" />
<parameter name="PCIeAddress31_0">0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000</parameter>
<parameter name="PCIeAddress63_32">0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000\,0x00000000</parameter>
<parameter name="RXM_BEN_WIDTH" value="8" />
<parameter name="RXM_DATA_WIDTH" value="64" />
<parameter name="SLAVE_ADDRESS_MAP_0" value="21" />
<parameter name="SLAVE_ADDRESS_MAP_1" value="0" />
<parameter name="SLAVE_ADDRESS_MAP_2" value="0" />
<parameter name="SLAVE_ADDRESS_MAP_3" value="0" />
<parameter name="SLAVE_ADDRESS_MAP_4" value="0" />
<parameter name="SLAVE_ADDRESS_MAP_5" value="0" />
<parameter name="TX_S_ADDR_WIDTH" value="32" />
<parameter name="advanced_default_hwtcl_atomic_malformed" value="true" />
<parameter name="advanced_default_hwtcl_atomic_op_completer_32bit" value="false" />
<parameter name="advanced_default_hwtcl_atomic_op_completer_64bit" value="false" />
<parameter name="advanced_default_hwtcl_atomic_op_routing" value="false" />
<parameter name="advanced_default_hwtcl_bridge_port_ssid_support" value="false" />
<parameter name="advanced_default_hwtcl_bridge_port_vga_enable" value="false" />
<parameter name="advanced_default_hwtcl_bypass_cdc" value="false" />
<parameter name="advanced_default_hwtcl_cas_completer_128bit" value="false" />
<parameter name="advanced_default_hwtcl_cdc_dummy_insert_limit" value="11" />
<parameter name="advanced_default_hwtcl_d0_pme" value="false" />
<parameter name="advanced_default_hwtcl_d1_pme" value="false" />
<parameter name="advanced_default_hwtcl_d1_support" value="false" />
<parameter name="advanced_default_hwtcl_d2_pme" value="false" />
<parameter name="advanced_default_hwtcl_d2_support" value="false" />
<parameter name="advanced_default_hwtcl_d3_cold_pme" value="false" />
<parameter name="advanced_default_hwtcl_d3_hot_pme" value="false" />
<parameter name="advanced_default_hwtcl_data_pack_rx" value="disable" />
<parameter name="advanced_default_hwtcl_deskew_comma" value="com_deskw" />
<parameter name="advanced_default_hwtcl_device_number" value="0" />
<parameter name="advanced_default_hwtcl_disable_link_x2_support" value="false" />
<parameter name="advanced_default_hwtcl_disable_snoop_packet" value="false" />
<parameter name="advanced_default_hwtcl_ei_delay_powerdown_count" value="10" />
<parameter name="advanced_default_hwtcl_eie_before_nfts_count" value="4" />
<parameter
name="advanced_default_hwtcl_enable_adapter_half_rate_mode"
value="false" />
<parameter name="advanced_default_hwtcl_enable_l1_aspm" value="false" />
<parameter name="advanced_default_hwtcl_enable_rx_buffer_checking" value="false" />
<parameter name="advanced_default_hwtcl_extended_format_field" value="false" />
<parameter name="advanced_default_hwtcl_extended_tag_reset" value="false" />
<parameter name="advanced_default_hwtcl_fc_init_timer" value="1024" />
<parameter name="advanced_default_hwtcl_flow_control_timeout_count" value="200" />
<parameter name="advanced_default_hwtcl_flow_control_update_count" value="30" />
<parameter name="advanced_default_hwtcl_flr_capability" value="false" />
<parameter name="advanced_default_hwtcl_gen2_diffclock_nfts_count" value="255" />
<parameter name="advanced_default_hwtcl_gen2_sameclock_nfts_count" value="255" />
<parameter name="advanced_default_hwtcl_hot_plug_support" value="0" />
<parameter name="advanced_default_hwtcl_interrupt_pin" value="inta" />
<parameter name="advanced_default_hwtcl_l01_entry_latency" value="31" />
<parameter name="advanced_default_hwtcl_l0_exit_latency_diffclock" value="6" />
<parameter name="advanced_default_hwtcl_l0_exit_latency_sameclock" value="6" />
<parameter name="advanced_default_hwtcl_l1_exit_latency_diffclock" value="0" />
<parameter name="advanced_default_hwtcl_l1_exit_latency_sameclock" value="0" />
<parameter name="advanced_default_hwtcl_low_priority_vc" value="single_vc" />
<parameter name="advanced_default_hwtcl_ltr_mechanism" value="false" />
<parameter name="advanced_default_hwtcl_ltssm_1ms_timeout" value="disable" />
<parameter name="advanced_default_hwtcl_ltssm_freqlocked_check" value="disable" />
<parameter name="advanced_default_hwtcl_maximum_current" value="0" />
<parameter name="advanced_default_hwtcl_no_command_completed" value="false" />
<parameter name="advanced_default_hwtcl_no_soft_reset" value="false" />
<parameter name="advanced_default_hwtcl_pclk_out_sel" value="pclk" />
<parameter name="advanced_default_hwtcl_pipex1_debug_sel" value="disable" />
<parameter name="advanced_default_hwtcl_register_pipe_signals" value="false" />
<parameter name="advanced_default_hwtcl_reserved_debug" value="0" />
<parameter
name="advanced_default_hwtcl_retry_buffer_last_active_address"
value="2047" />
<parameter name="advanced_default_hwtcl_rx_l0s_count_idl" value="0" />
<parameter name="advanced_default_hwtcl_set_l0s" value="0" />
<parameter name="advanced_default_hwtcl_skp_os_gen3_count" value="0" />
<parameter name="advanced_default_hwtcl_skp_os_schedule_count" value="0" />
<parameter name="advanced_default_hwtcl_ssid" value="0" />
<parameter name="advanced_default_hwtcl_ssvid" value="0" />
<parameter name="advanced_default_hwtcl_tph_completer" value="false" />
<parameter name="advanced_default_hwtcl_tx_cdc_almost_empty" value="5" />
<parameter name="advanced_default_hwtcl_vc0_clk_enable" value="true" />
<parameter name="advanced_default_hwtcl_wrong_device_id" value="disable" />
<parameter name="advanced_default_parameter_override" value="0" />
<parameter name="avmm_width_hwtcl" value="64" />
<parameter name="bar0_type_hwtcl" value="2" />
<parameter name="bar1_type_hwtcl" value="0" />
<parameter name="bar2_type_hwtcl" value="0" />
<parameter name="bar3_type_hwtcl" value="0" />
<parameter name="bar4_type_hwtcl" value="0" />
<parameter name="bar5_type_hwtcl" value="0" />
<parameter name="bypass_tl" value="false" />
<parameter name="class_code_hwtcl" value="0" />
<parameter name="completion_timeout_hwtcl" value="ABCD" />
<parameter name="device_id_hwtcl" value="167" />
<parameter name="dll_active_report_support_hwtcl" value="0" />
<parameter name="ecrc_check_capable_hwtcl" value="0" />
<parameter name="ecrc_gen_capable_hwtcl" value="0" />
<parameter name="enable_completion_timeout_disable_hwtcl" value="1" />
<parameter name="enable_function_msix_support_hwtcl" value="0" />
<parameter name="enable_pcisigtest_hwtcl" value="0" />
<parameter name="enable_power_on_rst_pulse_hwtcl" value="0" />
<parameter name="enable_slot_register_hwtcl" value="0" />
<parameter name="enable_tl_only_sim_hwtcl" value="0" />
<parameter name="endpoint_l0_latency_hwtcl" value="0" />
<parameter name="endpoint_l1_latency_hwtcl" value="0" />
<parameter name="expansion_base_address_register_hwtcl" value="0" />
<parameter name="extend_tag_field_hwtcl" value="32" />
<parameter name="fixed_address_mode" value="0" />
<parameter name="force_hrc" value="0" />
<parameter name="force_src" value="0" />
<parameter name="gen123_lane_rate_mode_hwtcl" value="Gen1 (2.5 Gbps)" />
<parameter name="gen3_rxfreqlock_counter_hwtcl" value="0" />
<parameter name="hip_reconfig_hwtcl" value="0" />
<parameter name="hip_tag_checking_hwtcl" value="1" />
<parameter name="hwtcl_override_g2_txvod" value="1" />
<parameter name="in_cvp_mode_hwtcl" value="0" />
<parameter name="io_window_addr_width_hwtcl" value="0" />
<parameter name="lane_mask_hwtcl" value="x1" />
<parameter name="max_payload_size_hwtcl" value="128" />
<parameter name="msi_64bit_addressing_capable_hwtcl" value="true" />
<parameter name="msi_masking_capable_hwtcl" value="false" />
<parameter name="msi_multi_message_capable_hwtcl" value="4" />
<parameter name="msi_support_hwtcl" value="true" />
<parameter name="msix_pba_bir_hwtcl" value="0" />
<parameter name="msix_pba_offset_hwtcl" value="0" />
<parameter name="msix_table_bir_hwtcl" value="0" />
<parameter name="msix_table_offset_hwtcl" value="0" />
<parameter name="msix_table_size_hwtcl" value="0" />
<parameter name="override_rxbuffer_cred_preset" value="0" />
<parameter name="override_tbpartner_driver_setting_hwtcl" value="0" />
<parameter name="pcie_inspector_hwtcl" value="0" />
<parameter name="pcie_qsys" value="1" />
<parameter name="pll_refclk_freq_hwtcl" value="100 MHz" />
<parameter name="port_link_number_hwtcl" value="1" />
<parameter name="port_type_hwtcl" value="Native endpoint" />
<parameter name="prefetchable_mem_window_addr_width_hwtcl" value="0" />
<parameter name="revision_id_hwtcl" value="1" />
<parameter name="rpre_emph_a_val_hwtcl" value="9" />
<parameter name="rpre_emph_b_val_hwtcl" value="0" />
<parameter name="rpre_emph_c_val_hwtcl" value="16" />
<parameter name="rpre_emph_d_val_hwtcl" value="13" />
<parameter name="rpre_emph_e_val_hwtcl" value="5" />
<parameter name="rvod_sel_a_val_hwtcl" value="42" />
<parameter name="rvod_sel_b_val_hwtcl" value="38" />
<parameter name="rvod_sel_c_val_hwtcl" value="38" />
<parameter name="rvod_sel_d_val_hwtcl" value="43" />
<parameter name="rvod_sel_e_val_hwtcl" value="15" />
<parameter name="rxbuffer_rxreq_hwtcl" value="Low" />
<parameter name="serial_sim_hwtcl" value="1" />
<parameter name="set_pld_clk_x1_625MHz_hwtcl" value="0" />
<parameter name="slot_number_hwtcl" value="0" />
<parameter name="slot_power_limit_hwtcl" value="0" />
<parameter name="slot_power_scale_hwtcl" value="0" />
<parameter name="slotclkcfg_hwtcl" value="1" />
<parameter name="subsystem_device_id_hwtcl" value="1" />
<parameter name="subsystem_vendor_id_hwtcl" value="418" />
<parameter name="surprise_down_error_support_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw0_hwtcl" value="2049" />
<parameter name="tlp_insp_trg_dw1_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw2_hwtcl" value="0" />
<parameter name="tlp_insp_trg_dw3_hwtcl" value="0" />
<parameter name="tlp_inspector_hwtcl" value="0" />
<parameter name="tlp_inspector_use_signal_probe_hwtcl" value="0" />
<parameter name="use_aer_hwtcl" value="1" />
<parameter name="use_ast_parity" value="0" />
<parameter name="use_atx_pll_hwtcl" value="0" />
<parameter name="use_crc_forwarding_hwtcl" value="0" />
<parameter name="use_cvp_update_core_pof_hwtcl" value="0" />
<parameter name="use_rx_st_be_hwtcl" value="0" />
<parameter name="user_id_hwtcl" value="0" />
<parameter name="vendor_id_hwtcl" value="4466" />
<parameter name="vsec_id_hwtcl" value="4466" />
<parameter name="vsec_rev_hwtcl" value="0" />
</module>
<module
name="pcie_ram"
kind="altera_avalon_onchip_memory2"
version="20.1"
enabled="1">
<parameter name="allowInSystemMemoryContentEditor" value="false" />
<parameter name="autoInitializationFileName">$${FILENAME}_pcie_ram</parameter>
<parameter name="blockType" value="AUTO" />
<parameter name="copyInitFile" value="false" />
<parameter name="dataWidth" value="128" />
<parameter name="dataWidth2" value="64" />
<parameter name="deviceFamily" value="Stratix V" />
<parameter name="deviceFeatures">COMPILER_SUPPORT 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 ANY_QFP 0 ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 HARDCOPY 0 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 1 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 1 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_18_BIT_MULTS 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IFP_USE_LEGACY_IO_CHECKER 1 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_BARE_DIE 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_SMI_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M144K_MEMORY 0 M10K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_MIGRATABLE 0 NOT_LISTED 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_POF 0 NO_PIN_OUT 0 NO_RPE_SUPPORT 0 NO_TDC_SUPPORT 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORT_HIGH_SPEED_HPS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_CRC 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QMAP_IN_DEVELOPMENT 0 QFIT_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_OCT_AUTO_CALIBRATION 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1</parameter>
<parameter name="dualPort" value="true" />
<parameter name="ecc_enabled" value="false" />
<parameter name="enPRInitMode" value="false" />
<parameter name="enableDiffWidth" value="true" />
<parameter name="initMemContent" value="true" />
<parameter name="initializationFileName" value="onchip_mem.hex" />
<parameter name="instanceID" value="NONE" />
<parameter name="memorySize" value="32768" />
<parameter name="readDuringWriteMode" value="DONT_CARE" />
<parameter name="resetrequest_enabled" value="false" />
<parameter name="simAllowMRAMContentsFile" value="false" />
<parameter name="simMemInitOnlyFilename" value="0" />
<parameter name="singleClockOperation" value="false" />
<parameter name="slave1Latency" value="1" />
<parameter name="slave2Latency" value="1" />
<parameter name="useNonDefaultInitFile" value="false" />
<parameter name="useShallowMemBlocks" value="false" />
<parameter name="writable" value="true" />
</module>
<module
name="pcie_reconfig"
kind="alt_xcvr_reconfig"
version="19.1"
enabled="1">
<parameter name="ber_en" value="0" />
<parameter name="device_family" value="Stratix V" />
<parameter name="enable_adce" value="0" />
<parameter name="enable_analog" value="0" />
<parameter name="enable_dcd" value="0" />
<parameter name="enable_dcd_power_up" value="1" />
<parameter name="enable_dfe" value="0" />
<parameter name="enable_eyemon" value="0" />
<parameter name="enable_mif" value="0" />
<parameter name="enable_offset" value="1" />
<parameter name="gui_cal_status_port" value="false" />
<parameter name="gui_enable_pll" value="0" />
<parameter name="gui_split_sizes" value="" />
<parameter name="number_of_reconfig_interfaces" value="2" />
</module>
<module
name="sysid_qsys_0"
kind="altera_avalon_sysid_qsys"
version="20.1"
enabled="1">
<parameter name="id" value="27394049" />
</module>
<connection
kind="avalon"
version="20.1"
start="pcie_hip.Rxm_BAR0"
end="sysid_qsys_0.control_slave">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00100000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
version="20.1"
start="pcie_hip.Rxm_BAR0"
end="pcie_ram.s1">
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x00110000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="clock"
version="20.1"
start="clk_125.clk"
end="sysid_qsys_0.clk" />
<connection
kind="clock"
version="20.1"
start="clk_125.clk"
end="clk_125_out.in_clk" />
<connection
kind="clock"
version="20.1"
start="clk_125.clk"
end="pcie_reconfig.mgmt_clk_clk" />
<connection
kind="clock"
version="20.1"
start="pcie_hip.coreclkout"
end="pcie_ram.clk1" />
<connection
kind="conduit"
version="20.1"
start="pcie_reconfig.reconfig_from_xcvr"
end="pcie_hip.reconfig_from_xcvr">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="20.1"
start="pcie_reconfig.reconfig_to_xcvr"
end="pcie_hip.reconfig_to_xcvr">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="reset"
version="20.1"
start="clk_125.clk_reset"
end="pcie_reconfig.mgmt_rst_reset" />
<connection
kind="reset"
version="20.1"
start="pcie_hip.nreset_status"
end="sysid_qsys_0.reset" />
<connection
kind="reset"
version="20.1"
start="pcie_hip.nreset_status"
end="pcie_ram.reset1" />
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
<interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>