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Design the Memory Representation (Final) #49

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ktemkin opened this issue Sep 23, 2024 · 0 comments
Open

Design the Memory Representation (Final) #49

ktemkin opened this issue Sep 23, 2024 · 0 comments
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@ktemkin @iamrecursion
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enhancement New feature or request
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M2: Minimum Viabl...

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ktemkin commented Sep 23, 2024 •
edited by iamrecursion
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Description

Our initial memory representation (#29) took some liberties in the name of speed. This task deals with shoring this up to ensure correctness and performance of our memory model, and how we translate from LLVM IR to that memory model.
@ktemkin ktemkin self-assigned this Sep 23, 2024
@iamrecursion iamrecursion self-assigned this Sep 23, 2024
@iamrecursion iamrecursion added the enhancement New feature or request label Sep 23, 2024
@iamrecursion iamrecursion mentioned this issue Sep 23, 2024
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enhancement New feature or request
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M2: Minimum Viable Product (I/O Only)
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@ktemkin @iamrecursion