Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

ePMP SAIL #12

Open
2 of 13 tasks
jjscheel opened this issue Mar 16, 2023 · 40 comments
Open
2 of 13 tasks

ePMP SAIL #12

jjscheel opened this issue Mar 16, 2023 · 40 comments
Assignees

Comments

@jjscheel
Copy link
Contributor

jjscheel commented Mar 16, 2023

Technical Group

Privileged Spec IC

ratification-pkg

Priv 1.12

Technical Liaison

Nick Kosifidis

Task Category

SAIL model

Task Sub Category

  • gcc
  • binutils
  • gdb
  • intrinsics
  • Java
  • KVM
  • ld
  • llvm
  • Linux kernel
  • QEMU
  • Spike

Ratification Target

3Q2023

Statement of Work (SOW)

SOW: link

SOW Signoffs: (delete those not needed)

  • Task group liaison sign-off date:
  • Development partner sign-off date:

Waiver

  • Freeze
  • Ratification

Pull Request Details

PR: link

@jjscheel
Copy link
Contributor Author

Status from Umer:

ePMP Sail task: As our PR is still in review, bill has added a switch to enable/disable ePMP in Sail, that PR has not been merged yet, once bill will merge that feature, ePMP Sail support will also be merged.

@jjscheel
Copy link
Contributor Author

@UmerShahidengr, can you provide a new target completion date given the previously mentioned dependencies?

@UmerShahidengr
Copy link

We will complete it till the end of this month at max.

@jjscheel
Copy link
Contributor Author

Thanks. New target completion set to April 30.

@jjscheel jjscheel assigned HamzaKh01 and unassigned jjscheel Apr 12, 2023
@HamzaKh01
Copy link

This is still pending according to this #12 (comment)

@jjscheel
Copy link
Contributor Author

jjscheel commented May 1, 2023

Given that this didn't complete in April, should I assume end of May or are we progressing, @HamzaKh01? What's your outlook?

@UmerShahidengr
Copy link

@HamzaKh01 and @billmcspadden-riscv , I am not sure what is the latest update on it. Can you please comment when will it be completed?

@HamzaKh01
Copy link

I need the switch implementation which I will get, when this PR-246 gets merged. I can't say anything about, when this be done .Bill is the author of this PR .Once this PR gets merged only then will my PR be able to merge because my implementation depends on it.

@jjscheel
Copy link
Contributor Author

jjscheel commented May 8, 2023

Thanks. Let's set Projected completion for 2 weeks and discuss more next meeting. Dropping from Agenda.

@UmerShahidengr
Copy link

Update May 23rd, 2023 => Not much update on this task yet. Still waiting it to be merged.

@jjscheel
Copy link
Contributor Author

Thanks, @UmerShahidengr. Removing from this week's agenda. Touch base again in 2 weeks.

@HamzaKh01, did we get the switch implementation? Is all code written and submitted via PR now?

@HamzaKh01
Copy link

@HamzaKh01, did we get the switch implementation?

PR of the switch implementation has been created by Bill, but not merged into the master.

@UmerShahidengr
Copy link

Update ⇾ June 12th, 2023:
PR is still pending

@jjscheel
Copy link
Contributor Author

@UmerShahidengr, @HamzaKh01, are we making progress on the discussion in the PR? There seems to be some confusion here.

@billmcspadden-riscv
Copy link

While we wait to get agreement on Sail model configuration, there is a workaround wherein the ePMP implementation can be tested.

Within the Sail ePMP implementation, create a function named "haveEPMP()" that returns "true". Put that function in riscv_sys_regs.sail. This will allow you to do some testing on your branch.

This function will be implemented (by parsing the ISA string) once we figure out the right way to parse the ISA string.

Bill Mc.

@jrtc27
Copy link

jrtc27 commented Jun 13, 2023

As I've said elsewhere before, we cannot block extensions on having an -march parser in the Sail model. We've taken extensions without that in the past, and there's no reason we can't continue to do so until such time as -march option support is properly implemented, which will be on the order of months, not days or weeks, given its complexity and the current needs-a-total-rewrite state of the current draft -march PR (which also doesn't even attempt to support it in the OCaml-based simulator, only the C one).

@HamzaKh01
Copy link

While we wait to get agreement on Sail model configuration, there is a workaround wherein the ePMP implementation can be tested .Within the Sail ePMP implementation, create a function named "haveEPMP()" that returns "true". Put that function in riscv_sys_regs.sail. This will allow you to do some testing on your branch.

I have tested my implementation quite a few times back by this same method.

As I've said elsewhere before, we cannot block extensions on having an -march parser in the Sail model. We've taken extensions without that in the past, and there's no reason we can't continue to do so

I was not aware of this earlier I was asked to modify my implementation as if there is a command-line switch to enable and disable ePMP so, I did that.

@UmerShahidengr
Copy link

Update ⇾ July 11th, 2023
PR is stalled. No progress has been made yet.

@jjscheel
Copy link
Contributor Author

@UmerShahidengr, please review the PR stall and let me know if there is anything we can do to achieve forward progress. Thanks!

@UmerShahidengr
Copy link

Dear @jjscheel, @HamzaKh01 has already completed the checklist and he has removed all dependencies. It is final from my side. I also request @billmcspadden-riscv to merge it so that this SoW gets closed.

@UmerShahidengr
Copy link

Update ⇾ Aug 15th, 2023
PR is stalled, Thanks to @marnovandermaas and @allenjbaum, some reviews were done on this PR but it is still not merged yet.

@UmerShahidengr
Copy link

Update ⇾ September 12th, 2023
No update on this. PR is still stalled.

@jjscheel
Copy link
Contributor Author

@billmcspadden-riscv, can you provide some guidance on what is needed to make progress here? Thanks!

@UmerShahidengr
Copy link

Update ⇾ September 26th, 2023
No update on this.

@UmerShahidengr
Copy link

Update ⇾ October 10th, 2023
No update on this.

@UmerShahidengr
Copy link

Update ⇾ October 24th, 2023
No update on this.

@UmerShahidengr
Copy link

Update ⇾ November 28th, 2023
No update on this.

@UmerShahidengr
Copy link

Update ⇾ December 12th, 2023
Stalled

@UmerShahidengr
Copy link

Update ⇾ January 30th, 2024
Stalled

@jjscheel
Copy link
Contributor Author

Understand. Will discuss in today's meeting.

@jjscheel
Copy link
Contributor Author

@billmcspadden-riscv, this is queued behind your test framework work. Correct?

@UmerShahidengr
Copy link

Update ⇾ March 5th, 2024
Stalled.

@jjscheel
Copy link
Contributor Author

jjscheel commented Mar 5, 2024

@billmcspadden-riscv, FYI.

@jjscheel
Copy link
Contributor Author

Any update @billmcspadden-riscv?

@UmerShahidengr
Copy link

Update April 30th, 2024:
Stalled, no update

@billmcspadden-riscv
Copy link

billmcspadden-riscv commented May 17, 2024

I've added the command line support for Smepmp. You can find my code on the
branch, haveSmepmp_billmcspadden (https://github.com/riscv/sail-riscv/tree/haveSmepmp_billmcspadden),
in the sail-riscv repo.

The command line switch is: --enable-smepmp
The Sail functional interface is: bool haveSmepmp()

I would suggest that you merge my code onto your branch and make
a unified PR that incorporates both my code and yours.

@jjscheel
Copy link
Contributor Author

@UmerShahidengr, please let us know if you need anything else from Bill.

@UmerShahidengr
Copy link

Update June 11th, 2024:
@billmcspadden-riscv we shelved this project and deallocated the resources in the last quarter, we will assign new resources in the next quarter to wrap this up. We dont have any immediate resources to take up this work. I will update you once I resume this project.

@jjscheel jjscheel moved this from As-planned to Blocked in RISC-V DevPartner Work Jun 11, 2024
@jjscheel
Copy link
Contributor Author

Will re-visit in July.

@UmerShahidengr
Copy link

Update October 29th, 2024:
A new PR has been added in sail (available here) and code of @HamzaKh01 has been added in it along with the updated command line support for Smepmp. Hope it will be reviewed and merged soon. so you can call it open since some activity has been started on this thing.

@jjscheel jjscheel moved this from Blocked to As-planned in RISC-V DevPartner Work Oct 30, 2024
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
Status: As-planned
Development

No branches or pull requests

5 participants