Vector SAIL

[jjscheel]

Technical Group

Vector TG

ratification-pkg

Vector

Technical Liaison

Krste

Task Category

SAIL model

Task Sub Category

• gcc
• binutils
• gdb
• intrinsics
• Java
• KVM
• ld
• llvm
• Linux kernel
• QEMU
• Spike

Ratification Target

4Q2021

Statement of Work (SOW)

SOW: link

SOW Signoffs:

• Task group liaison sign-off date:
• Development partner sign-off date:
• SAIL Golden Model sign-off date:

Waiver

• Freeze
• Ratification

Pull Request Details

Original, massive PR was too large for community consumption: riscv/sail-riscv#149

Revised plan was to submit, smaller PRs. Expect 5-8 PRS instead to split original code. Here's the current list:

• PR 1: General V Framework
• PR 2: Load and Store support
• PR 3: Integer/Fixed-point Arithmetic and Mask instructions
• PR 4: Vector floating-point instructions
• PR 5: Vector reduction and mask instructions
• PR 6: Merging vector extension code from vector-dev to the main branch

[jjscheel]

Hello, @XinlaiWan! No action needed here. I'm just tracking your work for DevPartners. Please keep working with the SAIL community. You're doing great work. Thank you!!!

[XinlaiWan]

Got it. Thank you, Jeff!

[jjscheel]

Email from Xi:

RVV Sail Model is waiting for folks reviewing the floating point instructions. We have one more PR and then Sail will be all set.

[jjscheel]

@billmcspadden-riscv reported that @XinlaiWan is submitting his 5th and final PR for this item.

Given this, I'm setting the Projected Completion to May 23.

@XinlaiWan, we also discussed the possibility of having your start work on Zvfh and Zvfhmin which was recently ratified. I'm working the SOW now and hope to have it ready by next meeting. Please chat with Xi about this.

[jrtc27]

When is all the code going through its final review to fix any code style issues that weren't caught because it was going to vector-dev not main and others did not want to impose the same strict standards for that branch?

[jjscheel]

Updated primary information with reference to 5th PR.

[jjscheel]

@billmcspadden-riscv confirmed in today's meeting that all code in the vector branch will be undergoing another PR for general code cleanup. All feature/function code has been included with the 5th PR.

[jjscheel]

Added reference to PR for merge of all code into main.

[jjscheel]

@XinlaiWan, any updates here?

[XinlaiWan]

The final PR of merging all code into the main branch is being reviewed, and we're waiting for reviewer's suggestions or approvals.

[jjscheel]

Thanks, Xinlai!!! -- Jeff Scheel (he/him/his) Director of Technical Programs, RISC-V Foundation

…

On Wed, Sep 13, 2023 at 6:57 AM Xinlai Wan ***@***.***> wrote: The final PR of merging all code into the main branch is being reviewed, and we're waiting for reviewer's suggestions or approvals. — Reply to this email directly, view it on GitHub <#24 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AC526HIEDYW5POUQXCX6B4LX2GGQRANCNFSM6AAAAAAV6UWYMU> . You are receiving this because you were assigned.Message ID: ***@***.***>

[jjscheel]

Hello, @XinlaiWan! As your work winds down with this item. Can you look at #28 (Zvfh/Zvfhmin) SAIL work next? I'm going to assign it to you to begin discussions. Thanks!

[XinlaiWan]

Hi Jeff, we'll follow the progress of this, and the development tasks will be assigned to my RIOS colleagues.

[jjscheel]

The final PR Accepted. @billmcspadden-riscv, can you confirm this SOW has been met, please?

[jrtc27]

Not complete. riscv/sail-riscv#359 exists, and it likely needs testing to find whatever other issues may remain, since testing can't have been all that thorough if that snuck through (assuming it was more than just a subtle encoding issue, as appears to be the case).

[jjscheel]

Understand @jrtc27. Thanks for the update. It's not surprising that in 10+ KLOC there's a bug or two. I'll keep this open until this first batch of active issues get closed.

However, the goal for my tracking is to get the function merged into a community for broader exposure and support, not to ensure the last bug has been removed. Yes, we don't want to compromise code quality, but on the other hand waiting for error-free code is impractical.

[jjscheel]

@billmcspadden-riscv, any update on the status of riscv/sail-riscv#359?

[jjscheel]

Final issue closed. Complete.