diff --git a/microbit/src/07-uart/Cargo.toml b/microbit/src/07-uart/Cargo.toml index 96c46b3e9..adb153b6f 100644 --- a/microbit/src/07-uart/Cargo.toml +++ b/microbit/src/07-uart/Cargo.toml @@ -4,23 +4,14 @@ version = "0.1.0" authors = ["Henrik Böving "] edition = "2018" -[dependencies.microbit-v2] -version = "0.12.0" -optional = true - -[dependencies.microbit] -version = "0.12.0" -optional = true - [dependencies] -cortex-m = "0.7.3" +microbit-v2 = "0.15.1" +cortex-m = { version = "0.7.7", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.0" -rtt-target = { version = "0.3.1", features = ["cortex-m"] } -panic-rtt-target = { version = "0.1.2", features = ["cortex-m"] } +rtt-target = "0.5.0" +panic-rtt-target = "0.1.2" nb = "1.0.0" -heapless = "0.7.10" -embedded-hal = "0.2.6" - -[features] -v2 = ["microbit-v2"] -v1 = ["microbit"] +heapless = "0.8.0" +embedded-hal = "1.0.0" +embedded-hal-nb = "1.0.0" +embedded-io = "0.6.1" diff --git a/microbit/src/07-uart/Embed.toml b/microbit/src/07-uart/Embed.toml index f5117ac42..255983587 100644 --- a/microbit/src/07-uart/Embed.toml +++ b/microbit/src/07-uart/Embed.toml @@ -1,6 +1,5 @@ [default.general] -# chip = "nrf52833_xxAA" # uncomment this line for micro:bit V2 -# chip = "nrf51822_xxAA" # uncomment this line for micro:bit V1 +chip = "nrf52833_xxAA" # uncomment this line for micro:bit V2 [default.reset] halt_afterwards = false diff --git a/microbit/src/07-uart/src/main.rs b/microbit/src/07-uart/src/main.rs index 0434ff883..9c02e7605 100644 --- a/microbit/src/07-uart/src/main.rs +++ b/microbit/src/07-uart/src/main.rs @@ -1,27 +1,18 @@ #![no_main] #![no_std] +use core::fmt::Write; use cortex_m_rt::entry; -use rtt_target::rtt_init_print; use panic_rtt_target as _; +use rtt_target::rtt_init_print; -#[cfg(feature = "v1")] -use microbit::{ - hal::prelude::*, - hal::uart, - hal::uart::{Baudrate, Parity}, -}; - -#[cfg(feature = "v2")] use microbit::{ - hal::prelude::*, hal::uarte, hal::uarte::{Baudrate, Parity}, }; -#[cfg(feature = "v2")] +use embedded_hal_nb::serial::Write as _; mod serial_setup; -#[cfg(feature = "v2")] use serial_setup::UartePort; #[entry] @@ -29,17 +20,6 @@ fn main() -> ! { rtt_init_print!(); let board = microbit::Board::take().unwrap(); - #[cfg(feature = "v1")] - let mut serial = { - uart::Uart::new( - board.UART0, - board.uart.into(), - Parity::EXCLUDED, - Baudrate::BAUD115200, - ) - }; - - #[cfg(feature = "v2")] let mut serial = { let serial = uarte::Uarte::new( board.UARTE0, @@ -50,7 +30,8 @@ fn main() -> ! { UartePort::new(serial) }; - nb::block!(serial.write(b'X')).unwrap(); + write!(serial, "The quick brown fox jumps over the lazy dog.\r\n").unwrap(); + nb::block!(serial.flush()).unwrap(); loop {} diff --git a/microbit/src/07-uart/src/serial_setup.rs b/microbit/src/07-uart/src/serial_setup.rs index eb3997aed..253ffca29 100644 --- a/microbit/src/07-uart/src/serial_setup.rs +++ b/microbit/src/07-uart/src/serial_setup.rs @@ -1,7 +1,9 @@ use core::fmt; -use embedded_hal::blocking::serial as bserial; -use embedded_hal::serial; -use microbit::hal::uarte::{Error, Instance, Uarte, UarteRx, UarteTx}; +use core::ptr::addr_of_mut; +use embedded_hal_nb::nb; +use embedded_hal_nb::serial::{Error as SerialError, ErrorType, Read, Write}; +use embedded_io::{Read as EmbeddedIoRead, Write as EmbeddedIoWrite}; +use microbit::hal::uarte::{Instance, Uarte, UarteRx, UarteTx}; static mut TX_BUF: [u8; 1] = [0; 1]; static mut RX_BUF: [u8; 1] = [0; 1]; @@ -11,36 +13,58 @@ pub struct UartePort(UarteTx, UarteRx); impl UartePort { pub fn new(serial: Uarte) -> UartePort { let (tx, rx) = serial - .split(unsafe { &mut TX_BUF }, unsafe { &mut RX_BUF }) + .split(unsafe { &mut *addr_of_mut!(TX_BUF) }, unsafe { + &mut *addr_of_mut!(RX_BUF) + }) .unwrap(); UartePort(tx, rx) } } -impl fmt::Write for UartePort { - fn write_str(&mut self, s: &str) -> fmt::Result { - self.0.write_str(s) +#[derive(Debug)] +pub enum Error { + Other, +} + +impl SerialError for Error { + fn kind(&self) -> embedded_hal_nb::serial::ErrorKind { + embedded_hal_nb::serial::ErrorKind::Other } } -impl serial::Write for UartePort { +impl ErrorType for UartePort { type Error = Error; +} - fn write(&mut self, b: u8) -> nb::Result<(), Self::Error> { - self.0.write(b) +impl fmt::Write for UartePort { + fn write_str(&mut self, s: &str) -> fmt::Result { + for byte in s.bytes() { + nb::block!(self.write(byte)).map_err(|_| fmt::Error)?; + } + Ok(()) + } +} + +impl Write for UartePort { + fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> { + self.0 + .write(&[word]) + .map_err(|_| nb::Error::Other(Error::Other))?; + Ok(()) } fn flush(&mut self) -> nb::Result<(), Self::Error> { - self.0.flush() + self.0.flush().map_err(|_| nb::Error::Other(Error::Other)) } } -impl bserial::write::Default for UartePort {} - -impl serial::Read for UartePort { - type Error = Error; - +impl Read for UartePort { fn read(&mut self) -> nb::Result { - self.1.read() + let mut buffer = [0u8; 1]; + match self.1.read(&mut buffer) { + Ok(1) => Ok(buffer[0]), + Ok(_) => Err(nb::Error::WouldBlock), + Err(_) => Err(nb::Error::Other(Error::Other)), + } } }