From ae239a242f729bb55a1cbc482afaca90540ea671 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 10 May 2024 11:46:16 +0300 Subject: [PATCH 1/2] implement Debug for Field/BitReader --- CHANGELOG.md | 2 ++ src/generate/generic.rs | 14 +++++++++++++- src/generate/register.rs | 6 ++---- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 54a911bf..ca83e615 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Yet more clean field `Debug` + ## [v0.33.2] - 2024-05-07 - Remove unneeded `format_args` in register `Debug` impl diff --git a/src/generate/generic.rs b/src/generate/generic.rs index d1b0ca0c..df2913a4 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -53,7 +53,7 @@ pub trait RegisterSpec { /// Raw field type pub trait FieldSpec: Sized { /// Raw field type (`u8`, `u16`, `u32`, ...). - type Ux: Copy + PartialEq + From; + type Ux: Copy + core::fmt::Debug + PartialEq + From; } /// Marker for fields with fixed values @@ -433,6 +433,12 @@ impl FieldReader { } } +impl core::fmt::Debug for FieldReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} + impl PartialEq for FieldReader where FI: FieldSpec + Copy, @@ -472,6 +478,12 @@ impl BitReader { } } +impl core::fmt::Debug for BitReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} + /// Marker for register/field writers which can take any value of specified width pub struct Safe; /// You should check that value is allowed to pass to register/field writer marked with this diff --git a/src/generate/register.rs b/src/generate/register.rs index b40d8a60..9ff29340 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -467,8 +467,6 @@ fn render_register_mod_debug( Some(a) => a, None => access, }; - let bit_or_bits = if f.bit_width() > 1 { "bits" } else { "bit" }; - let bit_or_bits = syn::Ident::new(bit_or_bits, span); log::debug!("register={} field={}", name, f.name); if field_access.can_read() && f.read_action.is_none() { if let Field::Array(_, de) = &f { @@ -476,7 +474,7 @@ fn render_register_mod_debug( let f_name_n = field_accessor(&f.name.expand_dim(&suffix), config, span); let f_name_n_s = format!("{f_name_n}"); r_debug_impl.extend(quote! { - .field(#f_name_n_s, &self.#f_name_n().#bit_or_bits()) + .field(#f_name_n_s, &self.#f_name_n()) }); } } else { @@ -484,7 +482,7 @@ fn render_register_mod_debug( let f_name = field_accessor(&f_name, config, span); let f_name_s = format!("{f_name}"); r_debug_impl.extend(quote! { - .field(#f_name_s, &self.#f_name().#bit_or_bits()) + .field(#f_name_s, &self.#f_name()) }); } } From 05bc3536f20e1351620f175514a11c8ffd2e6c2b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 10 May 2024 12:50:33 +0300 Subject: [PATCH 2/2] generic register Debug --- CHANGELOG.md | 2 +- src/generate/generic.rs | 9 +++++++++ src/generate/register.rs | 14 -------------- 3 files changed, 10 insertions(+), 15 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ca83e615..abf6b827 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- Yet more clean field `Debug` +- Yet more clean field & register `Debug` ## [v0.33.2] - 2024-05-07 diff --git a/src/generate/generic.rs b/src/generate/generic.rs index df2913a4..6921b5ab 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -258,6 +258,15 @@ impl Reg { } } +impl core::fmt::Debug for crate::generic::Reg +where + R: core::fmt::Debug +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} + #[doc(hidden)] pub mod raw { use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable}; diff --git a/src/generate/register.rs b/src/generate/register.rs index 9ff29340..20f749a3 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -331,12 +331,6 @@ pub fn render_register_mod( write!(f, "{}", self.bits()) } } - #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } - } }); } @@ -492,14 +486,6 @@ fn render_register_mod_debug( #close #close }); - r_debug_impl.extend(quote! { - #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } - } - }); } else if !access.can_read() || register.read_action.is_some() { r_debug_impl.extend(quote! { #debug_feature