SLI "shift by zero" creates an invalid shift on x86

[Syonyk]

Per the ARMv8 manual, "0" is a valid shift for SLI.

When building on x86 with a hardcoded zero shift, sli_n.h ends up with some invalid shifts as a result.

For a 32-bit shift, line 234 is where the problem occurs:

simde_vdupq_n_u32_((UINT32_C(0xffffffff) >> (32 - n)))),

"Warning: Right shift count >= width of type" is the error, and while I can't make a trivial reproduction case misbehave, I did see it misbehave with a zero shift in a larger project.

Since the range of valid SLI shifts is 0-(element width minus 1), one can reform it to not have an invalid shift amount:

simde_vdupq_n_u32_((UINT32_C(0x7fffffff) >> (31 - n)))),

This properly covers all cases from 0-31, and doesn't resolve to an invalid shift for the (ARM-legal) case of 0.

The 64-bit versions need similar modification.

I believe SRI may be similarly impacted.

[mr-c]

Thank you @Syonyk ; can you send a PR to fix this with tests to prove the fix?