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Rewriting system.
1 parent d136a1a commit 384be13

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8 files changed

+65
-64
lines changed

8 files changed

+65
-64
lines changed

jvm/src/test/scala/org/sireum/logika/LogikaTest.scala

+2-2
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,6 @@ object LogikaTest {
7979
smt2Caching = F,
8080
smt2Seq = F,
8181
branchPar = Config.BranchPar.All,
82-
branchParCores = Runtime.getRuntime.availableProcessors,
8382
atLinesFresh = T,
8483
interp = F,
8584
loopBound = 3,
@@ -98,7 +97,8 @@ object LogikaTest {
9897
atRewrite = T,
9998
searchPc = T,
10099
rwTrace = T,
101-
rwMax = 100
100+
rwMax = 100,
101+
rwPar = T
102102
)
103103

104104
lazy val isInGithubAction: B = Os.env("GITHUB_ACTION").nonEmpty

shared/src/main/scala/org/sireum/logika/Config.scala

+2-2
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,6 @@ import org.sireum._
5050
val smt2Caching: B,
5151
val smt2Seq: B,
5252
val branchPar: Config.BranchPar.Type,
53-
val branchParCores: Z,
5453
val atLinesFresh: B,
5554
val interp: B,
5655
val loopBound: Z,
@@ -69,7 +68,8 @@ import org.sireum._
6968
val atRewrite: B,
7069
val searchPc: B,
7170
val rwTrace: B,
72-
val rwMax: Z) {
71+
val rwMax: Z,
72+
val rwPar: B) {
7373

7474
@memoize def fingerprint: U64 = {
7575
return ops.StringOps(string).sha3U64(T, T)

shared/src/main/scala/org/sireum/logika/Logika.scala

+1-1
Original file line numberDiff line numberDiff line change
@@ -4404,7 +4404,7 @@ import Util._
44044404

44054405
if (!(branches.size == 2 && (branches(1).body.stmts.isEmpty || branches(0).body.stmts.isEmpty))) {
44064406
var first: Z = -1
4407-
val outputs = ops.MSZOps(inputs.toMS).mParMapCores(computeBranch _, config.branchParCores)
4407+
val outputs = ops.MSZOps(inputs.toMS).mParMapCores(computeBranch _, config.parCores)
44084408
for (i <- 0 until outputs.size) {
44094409
smt2.combineWith(outputs(i)._3)
44104410
}

shared/src/main/scala/org/sireum/logika/RewritingSystem.scala

+18-7
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,8 @@ object RewritingSystem {
136136
}
137137
}
138138

139-
@record class Rewriter(val th: TypeHierarchy,
139+
@record class Rewriter(val maxCores: Z,
140+
val th: TypeHierarchy,
140141
val provenClaims: HashSMap[AST.ProofAst.StepId ,AST.CoreExp.Base],
141142
val patterns: ISZ[Rewriter.Pattern],
142143
val shouldTrace: B,
@@ -181,7 +182,7 @@ object RewritingSystem {
181182
if (patterns2.isEmpty) {
182183
o
183184
} else {
184-
Rewriter(th, HashSMap.empty, patterns2, F, F, ISZ()).transformCoreExpBase(o).getOrElse(o)
185+
Rewriter(maxCores, th, HashSMap.empty, patterns2, F, F, ISZ()).transformCoreExpBase(o).getOrElse(o)
185186
}
186187
}
187188
}
@@ -207,6 +208,7 @@ object RewritingSystem {
207208
}
208209
} else {
209210
val pces = provenClaims.entries
211+
val par = maxCores > 1 && assumptions.size > 2 && pces.size > 2
210212
def recAssumption(pendingApplications: PendingApplications,
211213
substMap: HashMap[String, AST.Typed],
212214
apcs: ISZ[(AST.ProofAst.StepId, AST.CoreExp.Base)],
@@ -225,7 +227,7 @@ object RewritingSystem {
225227
val patterns2: ISZ[Rewriter.Pattern] =
226228
for (k <- 0 until apcs.size; apc <- toCondEquiv(th, apcs(k)._2)) yield
227229
r2l(Rewriter.Pattern(pattern.name :+ s"Assumption$k", F, isPermutative(apc), HashSSet.empty, apc))
228-
val o2 = Rewriter(th, HashSMap.empty, patterns2, F, F, ISZ()).transformCoreExpBase(o).getOrElse(o)
230+
val o2 = Rewriter(maxCores, th, HashSMap.empty, patterns2, F, F, ISZ()).transformCoreExpBase(o).getOrElse(o)
229231
val m = unifyExp(T, th, pattern.localPatternSet, from, o2, map, pas, sm, ems)
230232
if (ems.value.isEmpty) {
231233
unifyPendingApplications(T, th, pattern.localPatternSet, m, pas, sm, ems) match {
@@ -237,17 +239,26 @@ object RewritingSystem {
237239
return
238240
}
239241
val assumption = assumptions(j)
240-
var k = 0
241-
while (k < pces.size && !done) {
242+
def tryAssumption(pc: (AST.ProofAst.StepId, AST.CoreExp.Base)): Unit = {
243+
if (done) {
244+
return
245+
}
242246
val ems: MBox[UnificationErrorMessages] = MBox(ISZ())
243247
val pas = MBox(pendingApplications)
244248
val sm = MBox(substMap)
245-
val pc = pces(k)
246249
val m = unifyExp(T, th, pattern.localPatternSet, assumption, pc._2, map, pas, sm, ems)
247250
if (ems.value.isEmpty) {
248251
recAssumption(pas.value, sm.value, apcs :+ pc, m, j + 1)
249252
}
250-
k = k + 1
253+
}
254+
if (par) {
255+
ops.ISZOps(pces).mParMap(tryAssumption _)
256+
} else {
257+
var k = 0
258+
while (!done && k < pces.size) {
259+
tryAssumption(pces(k))
260+
k = k + 1
261+
}
251262
}
252263
}
253264
recAssumption(ISZ(), HashMap.empty, ISZ(), HashSMap.empty, 0)

shared/src/main/scala/org/sireum/logika/cli.scala

+8-8
Original file line numberDiff line numberDiff line change
@@ -136,12 +136,12 @@ object cli {
136136
)),
137137
OptGroup(name = "Optimizations", opts = ISZ(
138138
parOpt,
139-
Opt(name = "branchParMode", longKey = "par-branch-mode", shortKey = None(),
139+
Opt(name = "branchPar", longKey = "par-branch", shortKey = None(),
140140
tpe = Type.Choice("branchPar", None(), ISZ("all", "returns", "disabled")),
141141
description = "Branch parallelization mode"),
142-
Opt(name = "branchPar", longKey = "par-branch", shortKey = None(),
143-
tpe = Type.NumFlag(100, Some(1), Some(100)),
144-
description = "Enable parallelization (with CPU cores percentage to use)")
142+
Opt(name = "rwPar", longKey = "par-rw", shortKey = None(),
143+
tpe = Type.Flag(T),
144+
description = "Enable rewriting parallelization")
145145
)),
146146
OptGroup(name = "Path Splitting", opts = ISZ(
147147
Opt(name = "dontSplitFunQuant", longKey = "dont-split-pfq", shortKey = None(),
@@ -161,12 +161,12 @@ object cli {
161161
description = "Split on match expressions and statements")
162162
)),
163163
OptGroup(name = "Rewriting", opts = ISZ(
164-
Opt(name = "rwTrace", longKey = "rw-trace", shortKey = None(),
165-
tpe = Type.Flag(T),
166-
description = "Disable rewriting trace"),
167164
Opt(name = "rwMax", longKey = "rw-max", shortKey = None(),
168165
tpe = Type.Num(None(), 100, Some(1), None()),
169-
description = "Maximum number of rewriting")
166+
description = "Maximum number of rewriting"),
167+
Opt(name = "rwTrace", longKey = "rw-trace", shortKey = None(),
168+
tpe = Type.Flag(T),
169+
description = "Disable rewriting trace")
170170
)),
171171
OptGroup(name = "SMT2", opts = ISZ(
172172
Opt(name = "elideEncoding", longKey = "elide-encoding", shortKey = None(),

shared/src/main/scala/org/sireum/logika/options/OptionsCli.scala

+21-26
Original file line numberDiff line numberDiff line change
@@ -96,15 +96,15 @@ object OptionsCli {
9696
val logAtRewrite: B,
9797
val stats: B,
9898
val par: Option[Z],
99-
val branchParMode: LogikaBranchPar.Type,
100-
val branchPar: Option[Z],
99+
val branchPar: LogikaBranchPar.Type,
100+
val rwPar: B,
101101
val dontSplitFunQuant: B,
102102
val splitAll: B,
103103
val splitContract: B,
104104
val splitIf: B,
105105
val splitMatch: B,
106-
val rwTrace: B,
107106
val rwMax: Z,
107+
val rwTrace: B,
108108
val elideEncoding: B,
109109
val rawInscription: B,
110110
val rlimit: Z,
@@ -278,11 +278,9 @@ import OptionsCli._
278278
|-p, --par Enable parallelization (with CPU cores percentage to
279279
| use) (accepts an optional integer; min is 1; max is
280280
| 100; default is 100)
281-
| --par-branch-mode Branch parallelization mode (expects one of { all,
281+
| --par-branch Branch parallelization mode (expects one of { all,
282282
| returns, disabled }; default: all)
283-
| --par-branch Enable parallelization (with CPU cores percentage to
284-
| use) (accepts an optional integer; min is 1; max is
285-
| 100; default is 100)
283+
| --par-rw Enable rewriting parallelization
286284
|
287285
|Path Splitting Options:
288286
| --dont-split-pfq Do not force splitting in quantifiers and proof
@@ -293,9 +291,9 @@ import OptionsCli._
293291
| --split-match Split on match expressions and statements
294292
|
295293
|Rewriting Options:
296-
| --rw-trace Disable rewriting trace
297294
| --rw-max Maximum number of rewriting (expects an integer; min
298295
| is 1; default is 100)
296+
| --rw-trace Disable rewriting trace
299297
|
300298
|SMT2 Options:
301299
| --elide-encoding Strip out SMT2 encoding in feedback
@@ -345,15 +343,15 @@ import OptionsCli._
345343
var logAtRewrite: B = true
346344
var stats: B = false
347345
var par: Option[Z] = None()
348-
var branchParMode: LogikaBranchPar.Type = LogikaBranchPar.All
349-
var branchPar: Option[Z] = None()
346+
var branchPar: LogikaBranchPar.Type = LogikaBranchPar.All
347+
var rwPar: B = true
350348
var dontSplitFunQuant: B = false
351349
var splitAll: B = false
352350
var splitContract: B = false
353351
var splitIf: B = false
354352
var splitMatch: B = false
355-
var rwTrace: B = true
356353
var rwMax: Z = 100
354+
var rwTrace: B = true
357355
var elideEncoding: B = false
358356
var rawInscription: B = false
359357
var rlimit: Z = 2000000
@@ -549,19 +547,16 @@ import OptionsCli._
549547
case Some(v) => par = v
550548
case _ => return None()
551549
}
552-
} else if (arg == "--par-branch-mode") {
550+
} else if (arg == "--par-branch") {
553551
val o: Option[LogikaBranchPar.Type] = parseLogikaBranchPar(args, j + 1)
554552
o match {
555-
case Some(v) => branchParMode = v
553+
case Some(v) => branchPar = v
556554
case _ => return None()
557555
}
558-
} else if (arg == "--par-branch") {
559-
val o: Option[Option[Z]] = parseNumFlag(args, j + 1, Some(1), Some(100)) match {
560-
case o@Some(None()) => j = j - 1; Some(Some(100))
561-
case o => o
562-
}
556+
} else if (arg == "--par-rw") {
557+
val o: Option[B] = { j = j - 1; Some(!rwPar) }
563558
o match {
564-
case Some(v) => branchPar = v
559+
case Some(v) => rwPar = v
565560
case _ => return None()
566561
}
567562
} else if (arg == "--dont-split-pfq") {
@@ -594,18 +589,18 @@ import OptionsCli._
594589
case Some(v) => splitMatch = v
595590
case _ => return None()
596591
}
597-
} else if (arg == "--rw-trace") {
598-
val o: Option[B] = { j = j - 1; Some(!rwTrace) }
599-
o match {
600-
case Some(v) => rwTrace = v
601-
case _ => return None()
602-
}
603592
} else if (arg == "--rw-max") {
604593
val o: Option[Z] = parseNum(args, j + 1, Some(1), None())
605594
o match {
606595
case Some(v) => rwMax = v
607596
case _ => return None()
608597
}
598+
} else if (arg == "--rw-trace") {
599+
val o: Option[B] = { j = j - 1; Some(!rwTrace) }
600+
o match {
601+
case Some(v) => rwTrace = v
602+
case _ => return None()
603+
}
609604
} else if (arg == "--elide-encoding") {
610605
val o: Option[B] = { j = j - 1; Some(!elideEncoding) }
611606
o match {
@@ -675,7 +670,7 @@ import OptionsCli._
675670
isOption = F
676671
}
677672
}
678-
return Some(LogikaOption(help, parseArguments(args, j), background, manual, smt2Caching, transitionCaching, infoFlow, charBitWidth, fpRounding, useReal, intBitWidth, interprocedural, interproceduralContracts, strictPureMode, line, loopBound, callBound, patternExhaustive, pureFun, sat, skipMethods, skipTypes, logPc, logPcLines, logRawPc, logVc, logVcDir, logDetailedInfo, logAtRewrite, stats, par, branchParMode, branchPar, dontSplitFunQuant, splitAll, splitContract, splitIf, splitMatch, rwTrace, rwMax, elideEncoding, rawInscription, rlimit, sequential, simplify, smt2SatConfigs, smt2ValidConfigs, satTimeout, timeout, searchPC))
673+
return Some(LogikaOption(help, parseArguments(args, j), background, manual, smt2Caching, transitionCaching, infoFlow, charBitWidth, fpRounding, useReal, intBitWidth, interprocedural, interproceduralContracts, strictPureMode, line, loopBound, callBound, patternExhaustive, pureFun, sat, skipMethods, skipTypes, logPc, logPcLines, logRawPc, logVc, logVcDir, logDetailedInfo, logAtRewrite, stats, par, branchPar, rwPar, dontSplitFunQuant, splitAll, splitContract, splitIf, splitMatch, rwMax, rwTrace, elideEncoding, rawInscription, rlimit, sequential, simplify, smt2SatConfigs, smt2ValidConfigs, satTimeout, timeout, searchPC))
679674
}
680675

681676
def parseArguments(args: ISZ[String], i: Z): ISZ[String] = {

shared/src/main/scala/org/sireum/logika/options/OptionsUtil.scala

+11-17
Original file line numberDiff line numberDiff line change
@@ -114,8 +114,7 @@ object OptionsUtil {
114114
case OptionsCli.LogikaFPRoundingMode.TowardZero => "RTZ"
115115
}
116116
val parCores = LibUtil.parCoresOpt(maxCores, o.par)
117-
val branchParCores = LibUtil.parCoresOpt(maxCores, o.branchPar)
118-
val branchParMode: org.sireum.logika.Config.BranchPar.Type = o.branchParMode match {
117+
val branchPar: org.sireum.logika.Config.BranchPar.Type = o.branchPar match {
119118
case OptionsCli.LogikaBranchPar.All => org.sireum.logika.Config.BranchPar.All
120119
case OptionsCli.LogikaBranchPar.Returns => org.sireum.logika.Config.BranchPar.OnlyAllReturns
121120
case OptionsCli.LogikaBranchPar.Disabled => org.sireum.logika.Config.BranchPar.Disabled
@@ -155,8 +154,7 @@ object OptionsUtil {
155154
fpRoundingMode = fpRoundingMode,
156155
smt2Caching = defaultConfig.smt2Caching,
157156
smt2Seq = o.sequential,
158-
branchPar = branchParMode,
159-
branchParCores = branchParCores,
157+
branchPar = branchPar,
160158
atLinesFresh = o.logPcLines,
161159
interp = o.interprocedural,
162160
loopBound = o.loopBound,
@@ -175,7 +173,8 @@ object OptionsUtil {
175173
atRewrite = o.logAtRewrite,
176174
searchPc = o.searchPC,
177175
rwTrace = o.rwTrace,
178-
rwMax = o.rwMax
176+
rwMax = o.rwMax,
177+
rwPar = o.rwPar
179178
)
180179
return Either.Left(config)
181180
}
@@ -224,21 +223,13 @@ object OptionsUtil {
224223
r = r ++ ISZ[String]("--par", value.string)
225224
}
226225
}
227-
if (config.branchParCores > 1) {
228-
val value = config.branchParCores * 100 / maxCores
229-
if (value == 100) {
230-
r = r :+ "--par-branch"
231-
} else {
232-
r = r ++ ISZ[String]("--par-branch", value.string)
233-
}
234-
}
235226
if (config.branchPar != defaultConfig.branchPar) {
236227
val value: String = config.branchPar match {
237228
case Config.BranchPar.All => "all"
238229
case Config.BranchPar.OnlyAllReturns => "returns"
239230
case Config.BranchPar.Disabled => "disabled"
240231
}
241-
r = r ++ ISZ[String]("--par-branch-mode", value)
232+
r = r ++ ISZ[String]("--par-branch", value)
242233
}
243234
if (config.sat != defaultConfig.sat) {
244235
r = r :+ "--sat"
@@ -333,12 +324,15 @@ object OptionsUtil {
333324
if (config.searchPc != defaultConfig.searchPc) {
334325
r = r :+ "--search-pc"
335326
}
336-
if (config.rwTrace != defaultConfig.rwTrace) {
337-
r = r :+ "--rw-trace"
338-
}
339327
if (config.rwMax != defaultConfig.rwMax) {
340328
r = r ++ ISZ[String]("--rw-max", config.rwMax.string)
341329
}
330+
if (config.rwPar != defaultConfig.rwPar) {
331+
r = r :+ "--rw-par"
332+
}
333+
if (config.rwTrace != defaultConfig.rwTrace) {
334+
r = r :+ "--rw-trace"
335+
}
342336
}
343337
config.background match {
344338
case Config.BackgroundMode.Type => r = r ++ ISZ[String]("--background", "type")

shared/src/main/scala/org/sireum/logika/plugin/RewritePlugin.scala

+2-1
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,8 @@ import org.sireum.logika.{Logika, RewritingSystem, Smt2, State, StepProofContext
8989
}
9090
}
9191
}
92-
val rwPc = Rewriter(logika.th, provenClaims, patterns, logika.config.rwTrace, F, ISZ())
92+
val rwPc = Rewriter(if (logika.config.rwPar) logika.config.parCores else 1,
93+
logika.th, provenClaims, patterns, logika.config.rwTrace, F, ISZ())
9394
val fromCoreClaim = RewritingSystem.translate(logika.th, F, fromClaim)
9495
var done = F
9596
var rwClaim = fromCoreClaim

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