From ab790ed54b9fefe9eb605d5f2f8ee22f3cf74aae Mon Sep 17 00:00:00 2001
From: Stenzek <stenzek@gmail.com>
Date: Sun, 12 Jan 2025 00:25:48 +1000
Subject: [PATCH] Common: Fix ARM32 build (again)

---
 src/common/gsvector_neon.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/common/gsvector_neon.h b/src/common/gsvector_neon.h
index aca2d9f45c..eefb317b42 100644
--- a/src/common/gsvector_neon.h
+++ b/src/common/gsvector_neon.h
@@ -9,7 +9,11 @@
 
 #define GSVECTOR_HAS_FAST_INT_SHUFFLE8 1
 #define GSVECTOR_HAS_SRLV 1
+
+#ifdef CPU_ARCH_ARM64
+// tbl2 with 128-bit vectors is not in A32.
 #define GSVECTOR_HAS_TBL2 1
+#endif
 
 class GSVector2;
 class GSVector2i;
@@ -2174,12 +2178,14 @@ class alignas(16) GSVector4i
     return vgetq_lane_s64(vreinterpretq_s64_s32(v4s), i);
   }
 
+#ifdef CPU_ARCH_ARM64
   ALWAYS_INLINE GSVector4i tbl2(const GSVector4i& a, const GSVector4i& b, const GSVector4i& idx)
   {
     return GSVector4i(vreinterpretq_s32_u8(
       vqtbx2q_u8(vreinterpretq_u8_s32(v4s), uint8x16x2_t{vreinterpretq_u8_s32(a.v4s), vreinterpretq_u8_s32(b.v4s)},
                  vreinterpretq_u8_s32(idx.v4s))));
   }
+#endif
 
   ALWAYS_INLINE static GSVector4i loadnt(const void* p)
   {