From dcf052cc5e89e35226f8e09a74b7f429a78ffab4 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov <19325847+AndreySmirnov81@users.noreply.github.com> Date: Mon, 14 Mar 2022 15:20:04 +0300 Subject: [PATCH] rcc: access to `Enable` and `Reset` for owner only --- src/adc.rs | 6 +++--- src/afio.rs | 4 ++-- src/can.rs | 2 +- src/crc.rs | 2 +- src/dma.rs | 2 +- src/gpio.rs | 4 ++-- src/i2c.rs | 4 ++-- src/rcc.rs | 17 +++++------------ src/rcc/enable.rs | 10 +++++----- src/serial.rs | 4 ++-- src/spi.rs | 8 ++++---- src/timer.rs | 8 ++++---- src/usb.rs | 6 ++++-- 13 files changed, 36 insertions(+), 41 deletions(-) diff --git a/src/adc.rs b/src/adc.rs index 322b48b1..072b523d 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -271,15 +271,15 @@ macro_rules! adc_hal { } fn reset(&mut self) { - <$ADC>::reset(); + self.rb.reset(); } fn enable_clock(&mut self) { - <$ADC>::enable(); + self.rb.enable(); } fn disable_clock(&mut self) { - <$ADC>::disable(); + self.rb.disable(); } fn calibrate(&mut self) { diff --git a/src/afio.rs b/src/afio.rs index 038098ff..297b6777 100644 --- a/src/afio.rs +++ b/src/afio.rs @@ -13,8 +13,8 @@ pub trait AfioExt { impl AfioExt for AFIO { fn constrain(self) -> Parts { - AFIO::enable(); - AFIO::reset(); + self.enable(); + self.reset(); Parts { evcr: EVCR { _0: () }, diff --git a/src/can.rs b/src/can.rs index 5cc0b640..30e4f27e 100644 --- a/src/can.rs +++ b/src/can.rs @@ -95,7 +95,7 @@ where /// prevent accidental shared usage. #[cfg(not(feature = "connectivity"))] pub fn new(can: Instance, _usb: pac::USB) -> Can { - Instance::enable(); + can.enable(); Can { _peripheral: can } } diff --git a/src/crc.rs b/src/crc.rs index 6b163154..30087eb9 100644 --- a/src/crc.rs +++ b/src/crc.rs @@ -12,7 +12,7 @@ pub trait CrcExt { impl CrcExt for CRC { fn new(self) -> Crc { - CRC::enable(); + self.enable(); Crc { crc: self } } diff --git a/src/dma.rs b/src/dma.rs index a93b41e8..92ab00ac 100644 --- a/src/dma.rs +++ b/src/dma.rs @@ -447,7 +447,7 @@ macro_rules! dma { type Channels = Channels; fn split(self) -> Channels { - $DMAX::enable(); + self.enable(); // reset the DMA control registers (stops all on-going transfers) $( diff --git a/src/gpio.rs b/src/gpio.rs index cb26501f..eab4236f 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -366,8 +366,8 @@ macro_rules! gpio { type Parts = Parts; fn split(self) -> Parts { - $GPIOX::enable(); - $GPIOX::reset(); + self.enable(); + self.reset(); Parts { crl: Cr::<$port_id, false>(()), diff --git a/src/i2c.rs b/src/i2c.rs index 37c688fe..fabc4c34 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -166,8 +166,8 @@ where /// Configures the I2C peripheral to work in master mode fn configure>(i2c: I2C, pins: PINS, mode: M, clocks: Clocks) -> Self { let mode = mode.into(); - I2C::enable(); - I2C::reset(); + i2c.enable(); + i2c.reset(); let pclk1 = I2C::clock(&clocks); diff --git a/src/rcc.rs b/src/rcc.rs index 06aa920c..9039788d 100644 --- a/src/rcc.rs +++ b/src/rcc.rs @@ -73,13 +73,6 @@ impl APB1 { } } -impl APB1 { - /// Set power interface clock (PWREN) bit in RCC_APB1ENR - pub fn set_pwren() { - PWR::enable(); - } -} - /// Advanced Peripheral Bus 2 (APB2) registers pub struct APB2 { _0: (), @@ -308,8 +301,8 @@ impl BKP { /// Enables write access to the registers in the backup domain pub fn constrain(self, bkp: crate::pac::BKP, pwr: &mut PWR) -> BackupDomain { // Enable the backup interface by setting PWREN and BKPEN - crate::pac::BKP::enable(); - crate::pac::PWR::enable(); + bkp.enable(); + pwr.enable(); // Enable access to the backup registers pwr.cr.modify(|_r, w| w.dbp().set_bit()); @@ -468,12 +461,12 @@ pub trait RccBus: crate::Sealed { /// Enable/disable peripheral pub trait Enable: RccBus { - fn enable(); - fn disable(); + fn enable(&self); + fn disable(&self); } /// Reset peripheral pub trait Reset: RccBus { - fn reset(); + fn reset(&self); } #[derive(Clone, Copy, Debug, PartialEq)] diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index bab4db4e..b1b0be27 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -11,14 +11,14 @@ macro_rules! bus { } impl Enable for crate::pac::$PER { #[inline(always)] - fn enable() { + fn enable(&self) { let rcc = unsafe { &(*RCC::ptr()) }; unsafe { bb::set(Self::Bus::enr(rcc), $bit); } } #[inline(always)] - fn disable() { + fn disable(&self) { let rcc = unsafe { &(*RCC::ptr()) }; unsafe { bb::clear(Self::Bus::enr(rcc), $bit); @@ -27,7 +27,7 @@ macro_rules! bus { } impl Reset for crate::pac::$PER { #[inline(always)] - fn reset() { + fn reset(&self) { let rcc = unsafe { &(*RCC::ptr()) }; unsafe { bb::set(Self::Bus::rstr(rcc), $bit); @@ -49,14 +49,14 @@ macro_rules! ahb_bus { } impl Enable for crate::pac::$PER { #[inline(always)] - fn enable() { + fn enable(&self) { let rcc = unsafe { &(*RCC::ptr()) }; unsafe { bb::set(Self::Bus::enr(rcc), $bit); } } #[inline(always)] - fn disable() { + fn disable(&self) { let rcc = unsafe { &(*RCC::ptr()) }; unsafe { bb::clear(Self::Bus::enr(rcc), $bit); diff --git a/src/serial.rs b/src/serial.rs index b458e886..63aff0fb 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -292,8 +292,8 @@ impl Serial { PINS: Pins, { // Enable and reset USART - USART::enable(); - USART::reset(); + usart.enable(); + usart.reset(); PINS::remap(mapr); diff --git a/src/spi.rs b/src/spi.rs index bcc2b289..4a88fcb8 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -468,8 +468,8 @@ where { fn configure(spi: SPI, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self { // enable or reset SPI - SPI::enable(); - SPI::reset(); + spi.enable(); + spi.reset(); // disable SS output spi.cr2.write(|w| w.ssoe().clear_bit()); @@ -539,8 +539,8 @@ where { fn configure(spi: SPI, pins: PINS, mode: Mode) -> Self { // enable or reset SPI - SPI::enable(); - SPI::reset(); + spi.enable(); + spi.reset(); // disable SS output spi.cr2.write(|w| w.ssoe().clear_bit()); diff --git a/src/timer.rs b/src/timer.rs index 6907d532..2c62beff 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -637,8 +637,8 @@ impl Timer { /// Initialize timer pub fn new(tim: TIM, clocks: &Clocks) -> Self { // Enable and reset the timer peripheral - TIM::enable(); - TIM::reset(); + tim.enable(); + tim.reset(); Self { clk: TIM::timer_clock(clocks), @@ -710,8 +710,8 @@ impl FTimer { /// Initialize timer pub fn new(tim: TIM, clocks: &Clocks) -> Self { // Enable and reset the timer peripheral - TIM::enable(); - TIM::reset(); + tim.enable(); + tim.reset(); let mut t = Self { tim }; t.configure(clocks); diff --git a/src/usb.rs b/src/usb.rs index 4bfede8c..69e621a6 100644 --- a/src/usb.rs +++ b/src/usb.rs @@ -28,10 +28,12 @@ unsafe impl UsbPeripheral for Peripheral { const EP_MEMORY_ACCESS_2X16: bool = false; fn enable() { + // TODO: use self.usb, after adding the &self parameter + let usb = unsafe { crate::pac::Peripherals::steal().USB }; // Enable USB peripheral - USB::enable(); + usb.enable(); // Reset USB peripheral - USB::reset(); + usb.reset(); } fn startup_delay() {