-
Notifications
You must be signed in to change notification settings - Fork 0
/
ReactionGame.cycdx
387 lines (387 loc) · 33.3 KB
/
ReactionGame.cycdx
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
<block name="RGB_PWM_blue" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RGB_PWM_blue_COMPARE_Reg_" address="0x4000642C" bitWidth="8" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="RGB_PWM_blue_Control_Reg" address="0x4000647D" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="RGB_PWM_blue_STATUS_MASK" address="0x4000648C" bitWidth="8" desc="UDB Status bits Interrupt Mask Enable Register" hidden="false">
<field name="PWM_STS_CMP1" from="0" to="0" access="R" resetVal="" desc="Enables the Interrupt on Compare 1" hidden="false" />
<field name="PWM_STS_CMP2" from="1" to="1" access="R" resetVal="" desc="Enables the Interrupt on Compare 2" hidden="false" />
<field name="PWM_STS_TC" from="2" to="2" access="R" resetVal="" desc="Enables the Interrupt on Terminal Count" hidden="false" />
<field name="PWM_STS_FIFO_FULL" from="3" to="3" access="R" resetVal="" desc="FIFO Full Status Mask " hidden="false" />
<field name="PWM_STS_KILL" from="5" to="5" access="R" resetVal="" desc="Enables the Interrupt on Kill" hidden="false" />
</register>
<register name="RGB_PWM_blue_STATUS_AUX_CTRL" address="0x4000649C" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="RGB_PWM_green" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RGB_PWM_green_COMPARE_Reg_" address="0x40006424" bitWidth="8" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="RGB_PWM_green_Control_Reg" address="0x40006474" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="RGB_PWM_green_STATUS_MASK" address="0x40006484" bitWidth="8" desc="UDB Status bits Interrupt Mask Enable Register" hidden="false">
<field name="PWM_STS_CMP1" from="0" to="0" access="R" resetVal="" desc="Enables the Interrupt on Compare 1" hidden="false" />
<field name="PWM_STS_CMP2" from="1" to="1" access="R" resetVal="" desc="Enables the Interrupt on Compare 2" hidden="false" />
<field name="PWM_STS_TC" from="2" to="2" access="R" resetVal="" desc="Enables the Interrupt on Terminal Count" hidden="false" />
<field name="PWM_STS_FIFO_FULL" from="3" to="3" access="R" resetVal="" desc="FIFO Full Status Mask " hidden="false" />
<field name="PWM_STS_KILL" from="5" to="5" access="R" resetVal="" desc="Enables the Interrupt on Kill" hidden="false" />
</register>
<register name="RGB_PWM_green_STATUS_AUX_CTRL" address="0x40006494" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="PWM_Clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_G" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_R" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="RGB_PWM_red" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="RGB_PWM_red_COMPARE_Reg_" address="0x4000642D" bitWidth="8" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="RGB_PWM_red_Control_Reg" address="0x4000647C" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="RGB_PWM_red_STATUS_MASK" address="0x4000648D" bitWidth="8" desc="UDB Status bits Interrupt Mask Enable Register" hidden="false">
<field name="PWM_STS_CMP1" from="0" to="0" access="R" resetVal="" desc="Enables the Interrupt on Compare 1" hidden="false" />
<field name="PWM_STS_CMP2" from="1" to="1" access="R" resetVal="" desc="Enables the Interrupt on Compare 2" hidden="false" />
<field name="PWM_STS_TC" from="2" to="2" access="R" resetVal="" desc="Enables the Interrupt on Terminal Count" hidden="false" />
<field name="PWM_STS_FIFO_FULL" from="3" to="3" access="R" resetVal="" desc="FIFO Full Status Mask " hidden="false" />
<field name="PWM_STS_KILL" from="5" to="5" access="R" resetVal="" desc="Enables the Interrupt on Kill" hidden="false" />
</register>
<register name="RGB_PWM_red_STATUS_AUX_CTRL" address="0x4000649D" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="or_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Yellow_Led" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Red_Led" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Green_Led" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Timer_3secs" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="Timer_3secs_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">
<field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />
</register>
<register name="Timer_3secs_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">
<field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />
<field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">
<value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />
<value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />
</field>
<field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />
<field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />
<field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />
<field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">
<value name="Timer" value="0" desc="CMP and TC are output." />
<value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />
</field>
<field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />
</register>
<register name="Timer_3secs_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">
<field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />
<field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">
<value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />
<value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />
</field>
<field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />
<field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />
<field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />
<field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />
</register>
<register name="Timer_3secs_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">
<field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">
<value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />
<value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />
<value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />
<value name="Irq" value="11" desc="Timer runs until IRQ." />
</field>
<field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />
<field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />
<field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">
<value name="Equal" value="0" desc="Compare Equal " />
<value name="Less than" value="1" desc="Compare Less Than " />
<value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />
<value name="Greater" value="11" desc="Compare Greater Than ." />
<value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />
</field>
<field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />
</register>
<register name="Timer_3secs_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />
<register name="Timer_3secs_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />
</block>
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="isr_3secs" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWM_Red" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="PWM_Red_COMPARE_Reg_" address="0x40006425" bitWidth="8" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="PWM_Red_Control_Reg" address="0x40006475" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="PWM_Red_STATUS_AUX_CTRL" address="0x40006495" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="RGB_B" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWM_Green" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="PWM_Green_COMPARE_Reg_" address="0x40006525" bitWidth="8" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="PWM_Green_Control_Reg" address="0x40006576" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="PWM_Green_STATUS_AUX_CTRL" address="0x40006595" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWM_Yellow" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="vmTC" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmIRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="FFKillMux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="vmCompare" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="PWMUDB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="PWM_Yellow_COMPARE_Reg_" address="0x40006426" bitWidth="8" desc="UDB.D0 - Assigned Compare Value" hidden="false" />
<register name="PWM_Yellow_Control_Reg" address="0x40006476" bitWidth="8" desc="UDB Control Register - Assigned Control Register Value" hidden="false">
<field name="CTRL_ENABLE" from="7" to="7" access="RW" resetVal="" desc="Enable the PWM" hidden="false" />
<field name="CTRL_CMPMODE2" from="5" to="3" access="RW" resetVal="" desc="Compare mode 2" hidden="false" />
<field name="CTRL_CMPMODE1" from="2" to="0" access="RW" resetVal="" desc="Compare mode 1" hidden="false" />
</register>
<register name="PWM_Yellow_STATUS_AUX_CTRL" address="0x40006496" bitWidth="8" desc="UDB Auxilliary Control Register" hidden="false">
<field name="FIFO0_CLR" from="0" to="0" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO1_CLR" from="1" to="1" access="RW" resetVal="" desc="FIFO1 clear" hidden="false">
<value name="E_FIFO_CLR_0" value="0" desc="Normal FIFO operation" />
<value name="E_FIFO_CLR_1" value="1" desc="Clear FIFO state" />
</field>
<field name="FIFO0_LVL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="FIFO1_LVL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="E_FIFO_LVL_0" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
<value name="E_FIFO_LVL_1" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
</field>
<field name="INT_EN" from="4" to="4" access="RW" resetVal="" desc="" hidden="false">
<value name="E_INT_EN0" value="0" desc="Interrupt disabled" />
<value name="E_INT_EN1" value="1" desc="Interrupt enabled" />
</field>
<field name="CNT_START" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="E_CNT_START0" value="0" desc="Disable counter" />
<value name="E_CNT_START1" value="1" desc="Enable counter" />
</field>
</register>
</block>
<block name="isr_start_game" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SevenSeg_Reg" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SevenSeg_Reg_CONTROL_REG" address="0x40006577" bitWidth="8" desc="" hidden="false" />
</block>
<block name="Pin_Button_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_A" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_C" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_B" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_Button_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ErikaOS_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_Button_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_Button_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="isr_button_press" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="UART_LOG" BASE="0x0" SIZE="0x0" desc="UART" visible="true" hidden="false">
<block name="IntClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TXInternalInterrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BUART" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="TX_UART_LOG_TX_DATA" address="0x40006447" bitWidth="8" desc="TX Data Register" hidden="false" />
<register name="TX_UART_LOG_TX_STATUS" address="0x40006467" bitWidth="8" desc="TX status register" hidden="false">
<field name="UART_LOG_TX_STS_COMPLETE" from="0" to="0" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_TX_STS_FIFO_EMPTY" from="1" to="1" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_TX_STS_FIFO_FULL" from="2" to="2" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_TX_STS_FIFO_NOT_FULL" from="3" to="3" access="R" resetVal="" desc="" hidden="false" />
</register>
<register name="RX_UART_LOG_RX_ADDRESS1" address="0x40006524" bitWidth="8" desc="RX Address1 Register" hidden="false" />
<register name="RX_UART_LOG_RX_ADDRESS2" address="0x40006534" bitWidth="8" desc="RX Address2 Register" hidden="false" />
<register name="RX_UART_LOG_RX_DATA" address="0x40006544" bitWidth="8" desc="RX Data Register" hidden="false" />
<register name="RX_UART_LOG_RX_STATUS" address="0x40006567" bitWidth="8" desc="RX status register" hidden="false">
<field name="UART_LOG_RX_STS_MRKSPC" from="0" to="0" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_BREAK" from="1" to="1" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_PAR_ERROR" from="2" to="2" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_STOP_ERROR" from="3" to="3" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_OVERRUN" from="4" to="4" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_FIFO_NOTEMPTY" from="5" to="5" access="R" resetVal="" desc="" hidden="false" />
<field name="UART_LOG_RX_STS_ADDR_MATCH" from="6" to="6" access="R" resetVal="" desc="" hidden="false" />
</register>
</block>
<block name="Pin_Sel_A" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Rx_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="or_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Tx_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_E" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_D" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_F" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_DP" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Pin_7_seg_G" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</blockRegMap>