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Each core is supposed to deliver these signals to the M2M framework:
-- Video output video_ce_o : out std_logic; video_ce_ovl_o : out std_logic; video_red_o : out std_logic_vector(7 downto 0); video_green_o : out std_logic_vector(7 downto 0); video_blue_o : out std_logic_vector(7 downto 0); video_vs_o : out std_logic; video_hs_o : out std_logic; video_hblank_o : out std_logic; video_vblank_o : out std_logic;
But what does one do, if the core does not deliver any HBLANK/VBLANK signals?
For example: ZX-Uno: https://github.com/sy2002/zxuno4mega65/blob/dev-M2M/CORE/vhdl/main.vhd#L115
It only outputs HSYNC/VSYNC but no HBLANK/VBLANK.
How can we make the life of people who port cores as simple as possible when it comes to this topic?
The text was updated successfully, but these errors were encountered:
sy2002
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Each core is supposed to deliver these signals to the M2M framework:
But what does one do, if the core does not deliver any HBLANK/VBLANK signals?
For example: ZX-Uno:
https://github.com/sy2002/zxuno4mega65/blob/dev-M2M/CORE/vhdl/main.vhd#L115
It only outputs HSYNC/VSYNC but no HBLANK/VBLANK.
How can we make the life of people who port cores as simple as possible when it comes to this topic?
The text was updated successfully, but these errors were encountered: