@@ -13,10 +13,9 @@ void update_elf_offset(ph2_ir_t *ph2_ir)
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{
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switch (ph2_ir -> op ) {
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case OP_load_constant :
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- /* ARMv7 uses 12 bits to encode immediate value, but the
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- * higher 4 bits are for rotation. See A5.2.4 "Modified
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- * immediate constants in ARM instructions" in ARMv7-A
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- * manual.
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+ /* ARMv7 uses 12 bits to encode immediate value, but the higher 4 bits
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+ * are for rotation. See A5.2.4 "Modified immediate constants in ARM
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+ * instructions" in ARMv7-A manual.
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*/
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if (ph2_ir -> src0 < 0 )
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elf_offset += 12 ;
@@ -27,10 +26,9 @@ void update_elf_offset(ph2_ir_t *ph2_ir)
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return ;
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case OP_address_of :
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case OP_global_address_of :
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- /* ARMv7 uses 12 bits to encode immediate value, but the
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- * higher 4 bits are for rotation. See A5.2.4 "Modified
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- * immediate constants in ARM instructions" in ARMv7-A
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- * manual.
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+ /* ARMv7 uses 12 bits to encode immediate value, but the higher 4 bits
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+ * are for rotation. See A5.2.4 "Modified immediate constants in ARM
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+ * instructions" in ARMv7-A manual.
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*/
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if (ph2_ir -> src0 > 255 )
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elf_offset += 12 ;
@@ -45,8 +43,8 @@ void update_elf_offset(ph2_ir_t *ph2_ir)
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return ;
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case OP_load :
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case OP_global_load :
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- /* ARMv7 straight uses 12 bits to encode the offset of
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- * load instruction (no rotation).
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+ /* ARMv7 straight uses 12 bits to encode the offset of load instruction
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+ * (no rotation).
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*/
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if (ph2_ir -> src0 > 4095 )
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elf_offset += 16 ;
@@ -57,8 +55,8 @@ void update_elf_offset(ph2_ir_t *ph2_ir)
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return ;
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case OP_store :
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case OP_global_store :
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- /* ARMv7 straight uses 12 bits to encode the offset of
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- * store instruction (no rotation).
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+ /* ARMv7 straight uses 12 bits to encode the offset of store instruction
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+ * (no rotation).
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*/
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if (ph2_ir -> src1 > 4095 )
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elf_offset += 16 ;
@@ -126,10 +124,11 @@ void cfg_flatten()
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GLOBAL_FUNC .fn -> bbs -> elf_offset = elf_offset ;
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for (ph2_ir_t * ph2_ir = GLOBAL_FUNC .fn -> bbs -> ph2_ir_list .head ; ph2_ir ;
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- ph2_ir = ph2_ir -> next )
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+ ph2_ir = ph2_ir -> next ) {
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update_elf_offset (ph2_ir );
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+ }
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- /* prepare ` argc` and ` argv` , then proceed to ` main` function */
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+ /* prepare ' argc' and ' argv' , then proceed to ' main' function */
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elf_offset += 24 ;
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for (fn_t * fn = FUNC_LIST .head ; fn ; fn = fn -> next ) {
@@ -142,21 +141,23 @@ void cfg_flatten()
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for (basic_block_t * bb = fn -> bbs ; bb ; bb = bb -> rpo_next ) {
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bb -> elf_offset = elf_offset ;
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- if (bb == fn -> bbs )
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+ if (bb == fn -> bbs ) {
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/* save ra, sp */
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elf_offset += 16 ;
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+ }
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for (ph2_ir_t * insn = bb -> ph2_ir_list .head ; insn ;
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insn = insn -> next ) {
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flatten_ir = add_ph2_ir (OP_generic );
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memcpy (flatten_ir , insn , sizeof (ph2_ir_t ));
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- if (insn -> op == OP_return )
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+ if (insn -> op == OP_return ) {
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/* restore sp */
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flatten_ir -> src1 = bb -> belong_to -> func -> stack_size ;
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+ }
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if (insn -> op == OP_branch ) {
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- /* In SSA, we index ` else_bb` first, and then ` then_bb` */
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+ /* In SSA, we index ' else_bb' first, and then ' then_bb' */
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if (insn -> else_bb != bb -> rpo_next )
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flatten_ir -> is_branch_detached = 1 ;
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}
@@ -415,7 +416,7 @@ void code_generate()
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ph2_ir = ph2_ir -> next )
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emit_ph2_ir (ph2_ir );
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- /* prepare ` argc` and ` argv` , then proceed to ` main` function */
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+ /* prepare ' argc' and ' argv' , then proceed to ' main' function */
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emit (__movw (__AL , __r8 , GLOBAL_FUNC .stack_size ));
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emit (__movt (__AL , __r8 , GLOBAL_FUNC .stack_size ));
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emit (__add_r (__AL , __r8 , __r12 , __r8 ));
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