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1 |
| -// Copyright 2019-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved. |
| 1 | +// Copyright 2019-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved. |
2 | 2 | //
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3 | 3 | // Redistribution and use in source and binary forms, with or without
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4 | 4 | // modification, are permitted provided that the following conditions
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@@ -2105,7 +2105,11 @@ ModelInstanceState::SetInputTensors(
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2105 | 2105 | input, nullptr, nullptr, &input_shape,
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2106 | 2106 | &input_dims_count, nullptr, nullptr));
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2107 | 2107 |
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2108 |
| - batchn_shape[0] += GetElementCount(input_shape, input_dims_count); |
| 2108 | + int64_t element_cnt = 0; |
| 2109 | + RESPOND_AND_SET_NULL_IF_ERROR( |
| 2110 | + &((*responses)[idx]), |
| 2111 | + GetElementCount(input_shape, input_dims_count, &element_cnt)); |
| 2112 | + batchn_shape[0] += element_cnt; |
2109 | 2113 | }
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2110 | 2114 | } else {
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2111 | 2115 | batchn_shape =
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@@ -2160,7 +2164,10 @@ ModelInstanceState::SetInputTensors(
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2160 | 2164 | input, HostPolicyName().c_str(), nullptr, nullptr, &shape,
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2161 | 2165 | &dims_count, nullptr, &buffer_count));
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2162 | 2166 |
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2163 |
| - const int64_t batch_element_cnt = GetElementCount(shape, dims_count); |
| 2167 | + int64_t batch_element_cnt = 0; |
| 2168 | + RESPOND_AND_SET_NULL_IF_ERROR( |
| 2169 | + &((*responses)[idx]), |
| 2170 | + GetElementCount(shape, dims_count, &batch_element_cnt)); |
2164 | 2171 |
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2165 | 2172 | *cuda_copy |= SetStringInputTensor(
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2166 | 2173 | &input_list, input, input_name, buffer_count, batch_element_cnt,
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@@ -2347,7 +2354,8 @@ ModelInstanceState::ReadOutputTensors(
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2347 | 2354 | batchn_shape[0] = shape[0];
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2348 | 2355 | }
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2349 | 2356 |
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2350 |
| - const size_t tensor_element_cnt = GetElementCount(batchn_shape); |
| 2357 | + int64_t tensor_element_cnt = 0; |
| 2358 | + RETURN_IF_ERROR(GetElementCount(batchn_shape, &tensor_element_cnt)); |
2351 | 2359 |
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2352 | 2360 | // Only need an response tensor for requested outputs.
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2353 | 2361 | if (response != nullptr) {
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