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project.html
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<!DOCTYPE HTML>
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<title>Edu4Chip</title>
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<a href="index.html" class="logo"><strong>Edu4Chip</strong> - Joint Education for Advanced Chip Design in Europe</a>
<ul class="icons" style="">
<li>
<a href="#" class="icon">
<span class="image" style="margin-bottom:-10px; margin-top:-7px;">
<img src="images/logo_small.png" style="height:37px; width:37px;" alt="" />
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<h1>Project details</h1>
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<h2 id="content">Abstract</h2>
<p><span class="image right"><img src="images/logo_large.jpg" alt=""/></span>
The chip shortage crisis has shown that every sector of modern digitized countries is based on complex software and embedded products, which at their core are driven by integrated circuits. Next to the current chip manufacturing crisis, another upcoming challenge is the shortage of skilled chip design engineers and talents. Although most Higher Education Institutes (HEIs) offer microelectronics programs, the skill gap and shortage of chip designers continue to increase. Strengthening education in the microelectronics domain is therefore an urgent need. Collaboration among HEIs and the private sector is required in order to address the microelectronics market challenges and the associated European industrial demands of highly educated chip designers in a reasonable way. New course programs must be set up in a way to draw electrical and computer engineering bachelor graduates from Europe but also from other countries to pursue a master-level specialization in chip design in Europe.
</p>
<p>
Currently, almost all microelectronic education programs base their training on theoretical lectures of chip design and practical lab modules, which either simulate the designed hardware or synthesize the hardware design on programmable devices, such as FPGAs. While modern chip design education requires a deep understanding of circuit technology, it also needs wide practical training. The study programs targeted in this project bring such training to the next level by allowing students to design and tape-out their own chips during studies. This problem-oriented approach to chip design education will (1) deepen the students’ understanding of technology and circuit theory, and (2) let them gain hands-on experience at all stages of chip design to prepare them well for the European labor market. Additionally, such a tape-out, after which students hold their own running hardware design in their hands, increases the students’ motivation and involvement with the topic. This pulling effect will motivate more students to choose a master's specialization in chip design to satisfy the need for a higher number of well-educated chip design students in the semiconductor industry.
</p>
<p>
While in the past the cost and effort to set up chip tape-out projects with master-level students were out of reach for most universities, the rising availability of open-source hardware design IP such as RISC-V processors as well as more affordable chip prototyping manufacturing opens the possibility for integrating an advanced chip tape-out project into master level curricula. Nevertheless, the high effort involved in setting up such programs still requires strong European-level cooperation between HEIs, research institutes, and industry partners.
</p>
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<hr class="major" />
<h2 id="content">Objectives</h2>
<p>
Edu4Chip brings together a strong team of partners consisting of five universities, one research, one research institut, and three SMEs as beneficiaries supported formally by one SME and two industrial partners as associated partners and informally by several additional companies. The main objective of Edu4Chip is the joint development of new and the improvement of existing advanced circuit design master-level course programs at the university level, which provide students with the theoretical and practical skills to become chip designers entering the European labor market and help in this way to close the skills gap. The overall goal is achieved in Edu4Chip by: </p>
<div class="row">
<div class="col-6 col-12-small">
<h3>Objective 1</h3>
<p>
(a) Strengthening existing chip design and microelectronic master programs at four HEI partners and providing a new master program in chip design at one HEI (TUM) to teach students, in harmonized programs with hands-on experience in chip design as well as with excellent theoretical lectures, the required skills to design modern digital, analog, and mixed-signal integrated systems. (b) Providing skill training for engineers on modern chip design in the framework of life-long learning.
</p>
</div>
<div class="col-6 col-12-small">
<h3>Objective 2</h3>
<p>
Attracting qualified students with excellent teaching programs with intensive practical training modules framed around a tape-out project. The goal is to educate in the master programs and life-long learning modules at least 150 EU students plus 100 non-European Students per year. In addition, summer schools are planned to attract students and to support the cross-partner education concept and exchange of ideas among students. The goal is to foster diversity in this field by increasing the share of female students in comparison to similar study programs at each university.
</p>
</div>
<div class="col-6 col-12-small">
<h3>Objective 3</h3>
<p>
Developing the digital solutions and infrastructure to share the high effort in terms of maintaining a state-of-the-art environment with the required EDA toolchains and a joint template chip design that allows many student teams to do a chip tape-out every year.
</p>
</div>
<div class="col-6 col-12-small">
<h3>Objective 4</h3>
<p>
Establishing strong long-term partnerships between HEI members to allow students to switch between universities and sharing of teaching material.
</p>
</div>
<div class="col-6 col-12-small">
<h3>Objective 5</h3>
<p>
Strengthen partnerships of HEIs with local industry through internships, student thesis projects, and guest lecturers as well as between HEI and research institutes.
</p>
</div>
<div class="col-6 col-12-small">
<h3></h3>
<p>
</p>
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<hr class="major" />
<h2 id="content">Key data</h2>
<div class="table-wrapper">
<table>
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<td>Project number:</td>
<td>101123086</td>
</tr>
<tr>
<td>Call:</td>
<td>DIGITAL-2022-SKILLS-03</td>
</tr>
<tr>
<td>Topic:</td>
<td>DIGITAL-2022-SKILLS-03-SPECIALISED-EDU</td>
</tr>
<tr>
<td>Type of action:</td>
<td>DIGITAL Simple Grants</td>
</tr>
<tr>
<td>Granting authority:</td>
<td>European Health and Digital Executive Agency (HaDEA) - <a href="https://twitter.com/EU_HaDEA">Link to X</a></td>
</tr>
<tr>
<td>Project starting date:</td>
<td>1 October 2023</td>
</tr>
<tr>
<td>Project ending date:</td>
<td>30 September 2027</td>
</tr>
<tr>
<td>Link to EU portal:</td>
<td><a href="https://ec.europa.eu/info/funding-tenders/opportunities/portal/screen/opportunities/projects-details/43152860/101123086/undefined">https://ec.europa.eu/info/funding-tenders/opportunities/portal/screen/opportunities/projects-details/43152860/101123086/undefined</a></td></td>
</tr>
<tr>
<td>Funding/Budget:</td>
<td>6428373.29 EUR / 12856746.57 EUR</td>
</tr>
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<td></td>
<td></td>
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<hr class="major" />
<h2 id="content">Partners</h2>
<div class="row">
<div class="col-5 col-12-small">
<h3>Coordinator</h3>
<ul>
<li><a href="https://www.tum.de/">Technical University of Munich (TUM)</a></li>
</ul>
<h3>Beneficiaries</h3>
<ul>
<li><a href="https://www.kth.se/en">KTH Royal Institute of Technology</a></li>
<li><a href="https://www.dtu.dk/english/">Technical University of Denmark (DTU)</a></li>
<li><a href="https://www.tuni.fi/en">Tampere University (TAU)</a></li>
<li><a href="https://www.mines-stetienne.fr/en/">Institut Mines-Télécom (MINES Saint-Étienne)</a></li>
<li><a href="https://www.iis.fraunhofer.de/">Fraunhofer IIS</a></li>
<li><a href="https://www.syosil.com/">SyoSil ApS</a></li>
<li><a href="https://www.minres.com/">MINRES Technologies GmbH</a></li>
<li><a href="https://logiqworks.io/">LogiqWorks Ltd.</a></li>
</ul>
<h3>Associated partners</h3>
<ul>
<li><a href="https://www.infineon.com/">Infineon Technologies AG</a></li>
<li><a href="https://www.ti.com/">Texas Instruments</a></li>
<li><a href="https://www.vlsi.fi/">VLSI Solution Oy</a></li>
</ul>
<h3>External advisory board</h3>
</ul>
<li>To be announced.</li>
</ul>
<p></p>
</div>
<div class="col-7 col-12-small">
<h3>Partners' map</h3>
<span class="image fit"><img src="images/map.jpg" alt="" /></span>
</div>
</div>
</section>
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<strong>Edu4Chip</strong> - Joint Education for Advanced Chip Design in Europe is funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the European Health and Digital Executive Agency (HADEA). Neither the European Union nor the granting authority can be held responsible for them.
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© Untitled. All rights reserved. Design: <a href="https://html5up.net">HTML5 UP</a>.
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