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TransposePreloadUnroller seems to expand a pair of preload and flip-compute instructions into three instructions. The C address is rearraged into another preload instruction.
This expansion really perplex me. Why do WS transposed instructions get such special treatment?
inst is signal of RoCCInstruction type. They are used to exchange data between Gemmini and RISC-V CPU. In the downstream stages of Gemmini pipeline, it is not used anymore. So what is the point of above codes?
Thanks in advance for whoever might enlighten me in any way.
The text was updated successfully, but these errors were encountered:
Hello companions in Gemmini:
TransposePreloadUnroller
seems to expand a pair of preload and flip-compute instructions into three instructions. The C address is rearraged into another preload instruction.This expansion really perplex me. Why do WS transposed instructions get such special treatment?
And I also found
inst
is signal ofRoCCInstruction
type. They are used to exchange data between Gemmini and RISC-V CPU. In the downstream stages of Gemmini pipeline, it is not used anymore. So what is the point of above codes?Thanks in advance for whoever might enlighten me in any way.
The text was updated successfully, but these errors were encountered: