diff --git a/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v index 4e0882286..37940cb3c 100644 --- a/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v @@ -1004,13 +1004,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v index 2c2ddfb32..b828ee6d5 100644 --- a/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v @@ -778,13 +778,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v index 1506a5d0d..da5054d08 100644 --- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v @@ -1093,13 +1093,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v index acdc6b155..fb8efa571 100644 --- a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v @@ -1002,13 +1002,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v index 5f25f6687..63aa47f41 100644 --- a/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v @@ -744,13 +744,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v index 7c2fed65a..138d4e9f1 100644 --- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v @@ -1100,13 +1100,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/KR260/fpga/rtl/fpga_core.v b/fpga/mqnic/KR260/fpga/rtl/fpga_core.v index db0e3cbd6..8a1bc301a 100644 --- a/fpga/mqnic/KR260/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/KR260/fpga/rtl/fpga_core.v @@ -689,13 +689,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v index 2b8b82b75..cc976a559 100644 --- a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v @@ -646,13 +646,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v index 8a7a43728..de2c90180 100644 --- a/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v @@ -1135,13 +1135,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v index 7d46d78b8..bd67815a1 100644 --- a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v @@ -920,13 +920,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v index e5a55c615..fe4147164 100644 --- a/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v @@ -906,13 +906,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v index 31eb522ad..f4785493a 100644 --- a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v @@ -1049,13 +1049,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v index 1237aba21..ef407f024 100644 --- a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v @@ -1426,13 +1426,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v b/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v index a161afa4d..21dd8b1de 100644 --- a/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v @@ -773,13 +773,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/ZCU102/fpga/rtl/fpga_core_custom_port_demo.v b/fpga/mqnic/ZCU102/fpga/rtl/fpga_core_custom_port_demo.v index 87f5d7625..4297669c4 100644 --- a/fpga/mqnic/ZCU102/fpga/rtl/fpga_core_custom_port_demo.v +++ b/fpga/mqnic/ZCU102/fpga/rtl/fpga_core_custom_port_demo.v @@ -911,13 +911,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v index e2d71f70a..79cfc9941 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v +++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v @@ -74,6 +74,8 @@ module fpga # parameter TX_CHECKSUM_ENABLE = 1, parameter RX_HASH_ENABLE = 1, parameter RX_CHECKSUM_ENABLE = 1, + parameter LFC_ENABLE = PFC_ENABLE, + parameter PFC_ENABLE = 1, parameter ENABLE_PADDING = 1, parameter ENABLE_DIC = 1, parameter MIN_FRAME_LENGTH = 64, @@ -1077,6 +1079,8 @@ fpga_core #( .TX_CHECKSUM_ENABLE(TX_CHECKSUM_ENABLE), .RX_HASH_ENABLE(RX_HASH_ENABLE), .RX_CHECKSUM_ENABLE(RX_CHECKSUM_ENABLE), + .PFC_ENABLE(PFC_ENABLE), + .LFC_ENABLE(LFC_ENABLE), .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v index da69bdc64..e49c2fbd9 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v +++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v @@ -80,6 +80,8 @@ module fpga_core # parameter TX_CHECKSUM_ENABLE = 1, parameter RX_HASH_ENABLE = 1, parameter RX_CHECKSUM_ENABLE = 1, + parameter PFC_ENABLE = 1, + parameter LFC_ENABLE = PFC_ENABLE, parameter ENABLE_PADDING = 1, parameter ENABLE_DIC = 1, parameter MIN_FRAME_LENGTH = 64, @@ -664,7 +666,12 @@ wire [PORT_COUNT*TX_TAG_WIDTH-1:0] axis_eth_tx_ptp_ts_tag; wire [PORT_COUNT-1:0] axis_eth_tx_ptp_ts_valid; wire [PORT_COUNT-1:0] axis_eth_tx_ptp_ts_ready; +wire [PORT_COUNT-1:0] eth_tx_enable; wire [PORT_COUNT-1:0] eth_tx_status; +wire [PORT_COUNT-1:0] eth_tx_lfc_en; +wire [PORT_COUNT-1:0] eth_tx_lfc_req; +wire [PORT_COUNT*8-1:0] eth_tx_pfc_en; +wire [PORT_COUNT*8-1:0] eth_tx_pfc_req; wire [PORT_COUNT-1:0] eth_rx_clk; wire [PORT_COUNT-1:0] eth_rx_rst; @@ -679,7 +686,14 @@ wire [PORT_COUNT-1:0] axis_eth_rx_tready; wire [PORT_COUNT-1:0] axis_eth_rx_tlast; wire [PORT_COUNT*AXIS_ETH_RX_USER_WIDTH-1:0] axis_eth_rx_tuser; +wire [PORT_COUNT-1:0] eth_rx_enable; wire [PORT_COUNT-1:0] eth_rx_status; +wire [PORT_COUNT-1:0] eth_rx_lfc_en; +wire [PORT_COUNT-1:0] eth_rx_lfc_req; +wire [PORT_COUNT-1:0] eth_rx_lfc_ack; +wire [PORT_COUNT*8-1:0] eth_rx_pfc_en; +wire [PORT_COUNT*8-1:0] eth_rx_pfc_req; +wire [PORT_COUNT*8-1:0] eth_rx_pfc_ack; wire [PORT_COUNT-1:0] port_xgmii_tx_clk; wire [PORT_COUNT-1:0] port_xgmii_tx_rst; @@ -750,14 +764,16 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), + .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), - .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH) + .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), + .PFC_ENABLE(PFC_ENABLE), + .PAUSE_ENABLE(LFC_ENABLE) ) eth_mac_inst ( .tx_clk(port_xgmii_tx_clk[n]), @@ -765,6 +781,9 @@ generate .rx_clk(port_xgmii_rx_clk[n]), .rx_rst(port_xgmii_rx_rst[n]), + /* + * AXI input + */ .tx_axis_tdata(axis_eth_tx_tdata[n*AXIS_ETH_DATA_WIDTH +: AXIS_ETH_DATA_WIDTH]), .tx_axis_tkeep(axis_eth_tx_tkeep[n*AXIS_ETH_KEEP_WIDTH +: AXIS_ETH_KEEP_WIDTH]), .tx_axis_tvalid(axis_eth_tx_tvalid[n +: 1]), @@ -772,30 +791,121 @@ generate .tx_axis_tlast(axis_eth_tx_tlast[n +: 1]), .tx_axis_tuser(axis_eth_tx_tuser[n*AXIS_ETH_TX_USER_WIDTH +: AXIS_ETH_TX_USER_WIDTH]), + /* + * AXI output + */ .rx_axis_tdata(axis_eth_rx_tdata[n*AXIS_ETH_DATA_WIDTH +: AXIS_ETH_DATA_WIDTH]), .rx_axis_tkeep(axis_eth_rx_tkeep[n*AXIS_ETH_KEEP_WIDTH +: AXIS_ETH_KEEP_WIDTH]), .rx_axis_tvalid(axis_eth_rx_tvalid[n +: 1]), .rx_axis_tlast(axis_eth_rx_tlast[n +: 1]), .rx_axis_tuser(axis_eth_rx_tuser[n*AXIS_ETH_RX_USER_WIDTH +: AXIS_ETH_RX_USER_WIDTH]), + /* + * XGMII interface + */ .xgmii_rxd(port_xgmii_rxd[n*XGMII_DATA_WIDTH +: XGMII_DATA_WIDTH]), .xgmii_rxc(port_xgmii_rxc[n*XGMII_CTRL_WIDTH +: XGMII_CTRL_WIDTH]), .xgmii_txd(port_xgmii_txd[n*XGMII_DATA_WIDTH +: XGMII_DATA_WIDTH]), .xgmii_txc(port_xgmii_txc[n*XGMII_CTRL_WIDTH +: XGMII_CTRL_WIDTH]), + /* + * PTP + */ .tx_ptp_ts(eth_tx_ptp_ts_tod[n*PTP_TS_WIDTH +: PTP_TS_WIDTH]), .rx_ptp_ts(eth_rx_ptp_ts_tod[n*PTP_TS_WIDTH +: PTP_TS_WIDTH]), .tx_axis_ptp_ts(axis_eth_tx_ptp_ts[n*PTP_TS_WIDTH +: PTP_TS_WIDTH]), .tx_axis_ptp_ts_tag(axis_eth_tx_ptp_ts_tag[n*TX_TAG_WIDTH +: TX_TAG_WIDTH]), .tx_axis_ptp_ts_valid(axis_eth_tx_ptp_ts_valid[n +: 1]), + /* + * Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE) + */ + .tx_lfc_req(eth_tx_lfc_req[n +: 1]), + .tx_lfc_resend(1'b0), + .rx_lfc_en(eth_rx_lfc_en[n +: 1]), + .rx_lfc_req(eth_rx_lfc_req[n +: 1]), + .rx_lfc_ack(eth_rx_lfc_ack[n +: 1]), + + /* + * Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC) + */ + .tx_pfc_req(eth_tx_pfc_req[n*8 +: 8]), + .tx_pfc_resend(1'b0), + .rx_pfc_en(eth_rx_pfc_en[n*8 +: 8]), + .rx_pfc_req(eth_rx_pfc_req[n*8 +: 8]), + .rx_pfc_ack(eth_rx_pfc_ack[n*8 +: 8]), + + /* + * Pause interface + */ + .tx_lfc_pause_en(1'b1), + .tx_pause_req(1'b0), + .tx_pause_ack(), + + /* + * Status + */ + .tx_start_packet(), .tx_error_underflow(), + .rx_start_packet(), .rx_error_bad_frame(), .rx_error_bad_fcs(), - + .stat_tx_mcf(), + .stat_rx_mcf(), + .stat_tx_lfc_pkt(), + .stat_tx_lfc_xon(), + .stat_tx_lfc_xoff(), + .stat_tx_lfc_paused(), + .stat_tx_pfc_pkt(), + .stat_tx_pfc_xon(), + .stat_tx_pfc_xoff(), + .stat_tx_pfc_paused(), + .stat_rx_lfc_pkt(), + .stat_rx_lfc_xon(), + .stat_rx_lfc_xoff(), + .stat_rx_lfc_paused(), + .stat_rx_pfc_pkt(), + .stat_rx_pfc_xon(), + .stat_rx_pfc_xoff(), + .stat_rx_pfc_paused(), + + /* + * Configuration + */ .cfg_ifg(8'd12), - .cfg_tx_enable(1'b1), - .cfg_rx_enable(1'b1) + .cfg_tx_enable(eth_tx_enable[n +: 1]), + .cfg_rx_enable(eth_rx_enable[n +: 1]), + .cfg_mcf_rx_eth_dst_mcast(48'h01_80_C2_00_00_01), + .cfg_mcf_rx_check_eth_dst_mcast(1'b1), + .cfg_mcf_rx_eth_dst_ucast(48'd0), + .cfg_mcf_rx_check_eth_dst_ucast(1'b0), + .cfg_mcf_rx_eth_src(48'd0), + .cfg_mcf_rx_check_eth_src(1'b0), + .cfg_mcf_rx_eth_type(16'h8808), + .cfg_mcf_rx_opcode_lfc(16'h0001), + .cfg_mcf_rx_check_opcode_lfc(eth_rx_lfc_en[n +: 1]), + .cfg_mcf_rx_opcode_pfc(16'h0101), + .cfg_mcf_rx_check_opcode_pfc(eth_rx_pfc_en[n*8 +: 8] != 0), + .cfg_mcf_rx_forward(1'b0), + .cfg_mcf_rx_enable(eth_rx_lfc_en[n +: 1] || eth_rx_pfc_en[n*8 +: 8]), + .cfg_tx_lfc_eth_dst(48'h01_80_C2_00_00_01), + .cfg_tx_lfc_eth_src(48'h80_23_31_43_54_4C), + .cfg_tx_lfc_eth_type(16'h8808), + .cfg_tx_lfc_opcode(16'h0001), + .cfg_tx_lfc_en(eth_tx_lfc_en[n +: 1]), + .cfg_tx_lfc_quanta(16'hffff), + .cfg_tx_lfc_refresh(16'h7fff), + .cfg_tx_pfc_eth_dst(48'h01_80_C2_00_00_01), + .cfg_tx_pfc_eth_src(48'h80_23_31_43_54_4C), + .cfg_tx_pfc_eth_type(16'h8808), + .cfg_tx_pfc_opcode(16'h0101), + .cfg_tx_pfc_en(eth_tx_pfc_en[n*8 +: 8] != 0), + .cfg_tx_pfc_quanta({8{16'hffff}}), + .cfg_tx_pfc_refresh({8{16'h7fff}}), + .cfg_rx_lfc_opcode(16'h0001), + .cfg_rx_lfc_en(eth_rx_lfc_en[n +: 1]), + .cfg_rx_pfc_opcode(16'h0101), + .cfg_rx_pfc_en(eth_rx_pfc_en[n*8 +: 8] != 0) ); end @@ -868,6 +978,9 @@ mqnic_core_pcie_us #( .TX_CHECKSUM_ENABLE(TX_CHECKSUM_ENABLE), .RX_HASH_ENABLE(RX_HASH_ENABLE), .RX_CHECKSUM_ENABLE(RX_CHECKSUM_ENABLE), + .PFC_ENABLE(PFC_ENABLE), + .LFC_ENABLE(LFC_ENABLE), + .MAC_CTRL_ENABLE(0), .TX_FIFO_DEPTH(TX_FIFO_DEPTH), .RX_FIFO_DEPTH(RX_FIFO_DEPTH), .MAX_TX_SIZE(MAX_TX_SIZE), @@ -1152,7 +1265,13 @@ core_inst ( .s_axis_eth_tx_cpl_valid(axis_eth_tx_ptp_ts_valid), .s_axis_eth_tx_cpl_ready(axis_eth_tx_ptp_ts_ready), + .eth_tx_enable(eth_tx_enable), .eth_tx_status(eth_tx_status), + .eth_tx_lfc_en(eth_tx_lfc_en), + .eth_tx_lfc_req(eth_tx_lfc_req), + .eth_tx_pfc_en(eth_tx_pfc_en), + .eth_tx_pfc_req(eth_tx_pfc_req), + .eth_tx_fc_quanta_clk_en(0), .eth_rx_clk(eth_rx_clk), .eth_rx_rst(eth_rx_rst), @@ -1169,7 +1288,15 @@ core_inst ( .s_axis_eth_rx_tlast(axis_eth_rx_tlast), .s_axis_eth_rx_tuser(axis_eth_rx_tuser), + .eth_rx_enable(eth_rx_enable), .eth_rx_status(eth_rx_status), + .eth_rx_lfc_en(eth_rx_lfc_en), + .eth_rx_lfc_req(eth_rx_lfc_req), + .eth_rx_lfc_ack(eth_rx_lfc_ack), + .eth_rx_pfc_en(eth_rx_pfc_en), + .eth_rx_pfc_req(eth_rx_pfc_req), + .eth_rx_pfc_ack(eth_rx_pfc_ack), + .eth_rx_fc_quanta_clk_en(0), /* * DDR diff --git a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile index 54d76713e..ecefcd38e 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile +++ b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile @@ -62,6 +62,10 @@ VERILOG_SOURCES += ../../rtl/common/tdma_ber_ch.v VERILOG_SOURCES += ../../lib/eth/rtl/eth_mac_10g.v VERILOG_SOURCES += ../../lib/eth/rtl/axis_xgmii_rx_64.v VERILOG_SOURCES += ../../lib/eth/rtl/axis_xgmii_tx_64.v +VERILOG_SOURCES += ../../lib/eth/rtl/mac_ctrl_rx.v +VERILOG_SOURCES += ../../lib/eth/rtl/mac_ctrl_tx.v +VERILOG_SOURCES += ../../lib/eth/rtl/mac_pause_ctrl_rx.v +VERILOG_SOURCES += ../../lib/eth/rtl/mac_pause_ctrl_tx.v VERILOG_SOURCES += ../../lib/eth/rtl/lfsr.v VERILOG_SOURCES += ../../lib/eth/rtl/ptp_td_phc.v VERILOG_SOURCES += ../../lib/eth/rtl/ptp_td_leaf.v @@ -166,6 +170,8 @@ export PARAM_TX_CPL_FIFO_DEPTH := 32 export PARAM_TX_CHECKSUM_ENABLE := 1 export PARAM_RX_HASH_ENABLE := 1 export PARAM_RX_CHECKSUM_ENABLE := 1 +export PARAM_LFC_ENABLE := 1 +export PARAM_PFC_ENABLE := $(PARAM_LFC_ENABLE) export PARAM_TX_FIFO_DEPTH := 32768 export PARAM_RX_FIFO_DEPTH := 32768 export PARAM_MAX_TX_SIZE := 9214 diff --git a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py index 043c10680..bab18d1a7 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py +++ b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py @@ -3,6 +3,7 @@ import logging import os +import struct import sys import scapy.utils @@ -17,7 +18,7 @@ from cocotb.triggers import RisingEdge, FallingEdge, Timer from cocotbext.axi import AxiStreamBus -from cocotbext.eth import XgmiiSource, XgmiiSink +from cocotbext.eth import XgmiiSource, XgmiiSink, XgmiiFrame from cocotbext.pcie.core import RootComplex from cocotbext.pcie.xilinx.us import UltraScalePlusPcieDevice @@ -517,6 +518,35 @@ async def run_test_nic(dut): tb.loopback_enable = False + if tb.driver.interfaces[0].if_feature_lfc: + tb.log.info("Test LFC pause frame RX") + + await tb.driver.interfaces[0].ports[0].set_lfc_ctrl(mqnic.MQNIC_PORT_LFC_CTRL_TX_LFC_EN | mqnic.MQNIC_PORT_LFC_CTRL_RX_LFC_EN) + await tb.driver.hw_regs.read_dword(0) + + lfc_xoff = Ether(src='DA:D1:D2:D3:D4:D5', dst='01:80:C2:00:00:01', type=0x8808) / struct.pack('!HH', 0x0001, 2000) + + await tb.sfp_source[0].send(XgmiiFrame.from_payload(bytes(lfc_xoff))) + + count = 16 + + pkts = [bytearray([(x+k) % 256 for x in range(1514)]) for k in range(count)] + + tb.loopback_enable = True + + for p in pkts: + await tb.driver.interfaces[0].start_xmit(p, 0) + + for k in range(count): + pkt = await tb.driver.interfaces[0].recv() + + tb.log.info("Packet: %s", pkt) + assert pkt.data == pkts[k] + if tb.driver.interfaces[0].if_feature_rx_csum: + assert pkt.rx_checksum == ~scapy.utils.checksum(bytes(pkt.data[14:])) & 0xffff + + tb.loopback_enable = False + await RisingEdge(dut.clk_250mhz) await RisingEdge(dut.clk_250mhz) @@ -589,6 +619,10 @@ def test_fpga_core(request): os.path.join(eth_rtl_dir, "eth_mac_10g.v"), os.path.join(eth_rtl_dir, "axis_xgmii_rx_64.v"), os.path.join(eth_rtl_dir, "axis_xgmii_tx_64.v"), + os.path.join(eth_rtl_dir, "mac_ctrl_rx.v"), + os.path.join(eth_rtl_dir, "mac_ctrl_tx.v"), + os.path.join(eth_rtl_dir, "mac_pause_ctrl_rx.v"), + os.path.join(eth_rtl_dir, "mac_pause_ctrl_tx.v"), os.path.join(eth_rtl_dir, "lfsr.v"), os.path.join(eth_rtl_dir, "ptp_td_phc.v"), os.path.join(eth_rtl_dir, "ptp_td_leaf.v"), @@ -694,6 +728,8 @@ def test_fpga_core(request): parameters['TX_CHECKSUM_ENABLE'] = 1 parameters['RX_HASH_ENABLE'] = 1 parameters['RX_CHECKSUM_ENABLE'] = 1 + parameters['LFC_ENABLE'] = 1 + parameters['PFC_ENABLE'] = parameters['LFC_ENABLE'] parameters['TX_FIFO_DEPTH'] = 32768 parameters['RX_FIFO_DEPTH'] = 32768 parameters['MAX_TX_SIZE'] = 9214 diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v index a0897fa39..33eb225e0 100644 --- a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v +++ b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v @@ -727,13 +727,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v index 8043018b5..b3baac528 100644 --- a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v @@ -1107,13 +1107,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE), diff --git a/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v index 8d850d221..70b19329c 100644 --- a/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v @@ -1404,13 +1404,12 @@ generate .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), - .TX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .TX_PTP_TS_WIDTH(PTP_TS_WIDTH), + .PTP_TS_ENABLE(PTP_TS_ENABLE), + .PTP_TS_FMT_TOD(1), + .PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_PTP_TS_CTRL_IN_TUSER(0), .TX_PTP_TAG_ENABLE(PTP_TS_ENABLE), .TX_PTP_TAG_WIDTH(TX_TAG_WIDTH), - .RX_PTP_TS_ENABLE(PTP_TS_ENABLE), - .RX_PTP_TS_WIDTH(PTP_TS_WIDTH), .TX_USER_WIDTH(AXIS_ETH_TX_USER_WIDTH), .RX_USER_WIDTH(AXIS_ETH_RX_USER_WIDTH), .PFC_ENABLE(PFC_ENABLE),