{"payload":{"header_redesign_enabled":false,"results":[{"id":"298734226","archived":false,"color":"#3572A5","followers":39,"has_funding_file":false,"hl_name":"umarcor/osvb","hl_trunc_description":"Open Source Verification Bundle for VHDL and System Verilog","language":"Python","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":298734226,"name":"osvb","owner_id":38422348,"owner_login":"umarcor","updated_at":"2024-01-12T01:13:53.051Z","has_issues":true}},"sponsorable":true,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":78,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Aumarcor%252Fosvb%2B%2Blanguage%253APython","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/umarcor/osvb/star":{"post":"56c51zkJMLUA63SqBpFmsyL7klYL_v--Ix801XQTbeMioaKcn5B-Ek8KfHAHbPtgGq-NJ_YoeWzXfbl3Hsshrw"},"/umarcor/osvb/unstar":{"post":"LakQktySPAfBvKpDHXElfT_PWAd8QXiPbELyWLegMA9C21NAc-unGdx0ldlgxKXukvWJmh8e6AP4qgMrHVWJrw"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"lPtSYgFaO4C4QRrwKKVbV4GjAYpb07doN2XS8jLLLHy18MQkuGTHNsobDwkV42h_6rIi6cDke9xSUiq248p-BQ"}}},"title":"Repository search results"}