diff --git a/IniReader.cpp b/IniReader.cpp
index b338b47..4c68271 100644
--- a/IniReader.cpp
+++ b/IniReader.cpp
@@ -94,6 +94,9 @@ unsigned IDD6;
 unsigned IDD6L;
 unsigned IDD7;
 
+// Delay Queue
+unsigned int DQ_DEPTH;
+
 
 //in bytes
 unsigned JEDEC_DATA_BUS_BITS;
@@ -206,9 +209,30 @@ static ConfigMap configMap[] =
 	DEFINE_BOOL_PARAM(DEBUG_POWER,SYS_PARAM),
 	DEFINE_BOOL_PARAM(VIS_FILE_OUTPUT,SYS_PARAM),
 	DEFINE_BOOL_PARAM(VERIFICATION_OUTPUT,SYS_PARAM),
+	// Delay queue
+	// DEFINE_UINT_PARAM(DQ_DEPTH, SYS_PARAM),
+	{"DQ_DEPTH", &DQ_DEPTH, UINT, SYS_PARAM, true },
 	{"", NULL, UINT, SYS_PARAM, false} // tracer value to signify end of list; if you delete it, epic fail will result
 };
 
+IniReader::IniReader(void){
+	for (size_t i=0; configMap[i].variablePtr != NULL; i++) 
+	{ 
+		switch (configMap[i].variableType) 
+		{
+			case UINT:
+			case UINT64:
+			case FLOAT:   
+			case BOOL:
+				*(unsigned *)configMap[i].variablePtr = 0;
+				break;
+			case STRING:
+				break;
+		}
+	}
+}
+
+
 void IniReader::WriteParams(std::ofstream &visDataOut, paramType type)
 {
 	for (size_t i=0; configMap[i].variablePtr != NULL; i++)
diff --git a/IniReader.h b/IniReader.h
index efc6abf..f30d640 100644
--- a/IniReader.h
+++ b/IniReader.h
@@ -63,6 +63,7 @@ typedef struct _configMap
 
 class IniReader
 {
+	IniReader(void);
 
 public:
 	typedef std::map<string, string> OverrideMap;
diff --git a/MultiChannelMemorySystem.cpp b/MultiChannelMemorySystem.cpp
index 653461f..8d7c9ea 100644
--- a/MultiChannelMemorySystem.cpp
+++ b/MultiChannelMemorySystem.cpp
@@ -38,6 +38,7 @@
 #include "AddressMapping.h"
 #include "IniReader.h"
 
+#include <queue>
 
 
 using namespace DRAMSim; 
@@ -388,6 +389,24 @@ void MultiChannelMemorySystem::actual_update()
 		}
 		csvOut->finalize();
 	}
+
+	// Delay Queue
+
+	vector<delayedInfo>::iterator it = delayedTransactions.begin();
+	while(it != delayedTransactions.end()) 
+	{
+		if ((*it).delayedTicks>0)
+		{
+			(*it).delayedTicks--;
+			it++;
+		}
+		else
+		{
+			struct delayedInfo t = *it;
+			addTransaction_delayed(t.isWrite, t.addr);
+			it = delayedTransactions.erase(it);
+		}
+	}
 	
 	for (size_t i=0; i<NUM_CHANS; i++)
 	{
@@ -397,6 +416,7 @@ void MultiChannelMemorySystem::actual_update()
 
 	currentClockCycle++; 
 }
+
 unsigned MultiChannelMemorySystem::findChannelNumber(uint64_t addr)
 {
 	// Single channel case is a trivial shortcut case 
@@ -425,10 +445,12 @@ unsigned MultiChannelMemorySystem::findChannelNumber(uint64_t addr)
 	return channelNumber;
 
 }
+
 ostream &MultiChannelMemorySystem::getLogFile()
 {
 	return dramsim_log; 
 }
+
 bool MultiChannelMemorySystem::addTransaction(const Transaction &trans)
 {
 	// copy the transaction and send the pointer to the new transaction 
@@ -443,8 +465,20 @@ bool MultiChannelMemorySystem::addTransaction(Transaction *trans)
 
 bool MultiChannelMemorySystem::addTransaction(bool isWrite, uint64_t addr)
 {
-	unsigned channelNumber = findChannelNumber(addr); 
-	return channels[channelNumber]->addTransaction(isWrite, addr); 
+	struct delayedInfo newTransaction = {addr, isWrite, DQ_DEPTH};
+	delayedTransactions.push_back(newTransaction);
+	return true;
+}
+
+void MultiChannelMemorySystem::addTransaction_delayed(bool isWrite, uint64_t addr)
+{
+	unsigned channelNumber = findChannelNumber(addr);
+
+	if ( channels[channelNumber]->addTransaction(isWrite, addr) == false ) 
+	{
+		struct delayedInfo newTransaction = {addr, isWrite, 1};
+		delayedTransactions.push_back( newTransaction ) ;
+	}
 }
 
 /*
@@ -475,7 +509,6 @@ bool MultiChannelMemorySystem::willAcceptTransaction()
 }
 
 
-
 void MultiChannelMemorySystem::printStats(bool finalStats) {
 
 	(*csvOut) << "ms" <<currentClockCycle * tCK * 1E-6; 
@@ -487,6 +520,7 @@ void MultiChannelMemorySystem::printStats(bool finalStats) {
 	}
 	csvOut->finalize();
 }
+
 void MultiChannelMemorySystem::RegisterCallbacks( 
 		TransactionCompleteCB *readDone,
 		TransactionCompleteCB *writeDone,
diff --git a/MultiChannelMemorySystem.h b/MultiChannelMemorySystem.h
index 79df8e2..99ac612 100644
--- a/MultiChannelMemorySystem.h
+++ b/MultiChannelMemorySystem.h
@@ -35,9 +35,18 @@
 #include "ClockDomain.h"
 #include "CSVWriter.h"
 
+#include <vector>
+#include <queue>
 
 namespace DRAMSim {
 
+struct delayedInfo{
+	uint64_t 	    addr;
+	bool 		    isWrite;
+	unsigned int 	delayedTicks;
+};
+
+
 
 class MultiChannelMemorySystem : public SimulatorObject 
 {
@@ -50,6 +59,7 @@ class MultiChannelMemorySystem : public SimulatorObject
 			bool addTransaction(bool isWrite, uint64_t addr);
 			bool willAcceptTransaction(); 
 			bool willAcceptTransaction(uint64_t addr); 
+			void addTransaction_delayed(bool isWrite, uint64_t addr);
 			void update();
 			void printStats(bool finalStats=false);
 			ostream &getLogFile();
@@ -72,7 +82,8 @@ class MultiChannelMemorySystem : public SimulatorObject
 	private:
 		unsigned findChannelNumber(uint64_t addr);
 		void actual_update(); 
-		vector<MemorySystem*> channels; 
+		vector<MemorySystem*> channels;
+		vector<delayedInfo> delayedTransactions; 
 		unsigned megsOfMemory; 
 		string deviceIniFilename;
 		string systemIniFilename;
diff --git a/SystemConfiguration.h b/SystemConfiguration.h
index 68d7d0a..28b8828 100644
--- a/SystemConfiguration.h
+++ b/SystemConfiguration.h
@@ -88,6 +88,8 @@ extern unsigned TRANSACTION_SIZE;
 extern unsigned THROW_AWAY_BITS;
 extern unsigned COL_LOW_BIT_WIDTH;
 
+extern unsigned int DQ_DEPTH;
+
 //in nanoseconds
 extern unsigned REFRESH_PERIOD;
 extern float tCK;