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Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5768 since there are 2 wordlines (1 for each port) per BRAM row. #37

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merged 3 commits into from
Oct 19, 2022

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yc2367
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@yc2367 yc2367 commented Oct 18, 2022

Modification based on issue #36

@vaughnbetz
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Looks good; could you also add to the comment that the two wordline drivers per row is due to having two ports?

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@sadegh68 @aman26kbm : FYI.

@yc2367 yc2367 changed the title Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5769 Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5769 since there are 2 wordlines (1 for each port) per BRAM row. Oct 18, 2022
@yc2367 yc2367 changed the title Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5769 since there are 2 wordlines (1 for each port) per BRAM row. Added a factor of 2 for RAM_wordlinedriver_area in fpga.py, line 5768 since there are 2 wordlines (1 for each port) per BRAM row. Oct 18, 2022
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yc2367 commented Oct 19, 2022

I have added comments in fpga.py, line 5768

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Great, thanks!

@vaughnbetz vaughnbetz merged commit da0e870 into vaughnbetz:master Oct 19, 2022
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2 participants