Expressions

[drom]

Bare signal

Any bare word matching signal name should yield a signal lane on the background

clock __/--\__/--\__
reset_n _____/------

Signal truncate / extend #13

logical, arithmetic, bit-wise, reduction Operations

Verilog Operators

data & !mask

WAL -- will need to provide comparable set of operations

(& data (! mask)) ;; hypothetical