Connecting Wishbone busses - naming conventions

[wzab]

I have just lost a significant amount of time in one of AGWB-using designs to fix my stupid mistake caused by inconsistent naming of signals.

We usually use signals like below to name the parts of the Wishbone bus:

agwb/tests/test/hdl/main.vhd

Line 48 in 73625ed

LINKS_wb_m_o => LINKS_wb_m_o,

agwb/tests/test/hdl/main.vhd

Line 49 in 73625ed

LINKS_wb_m_i => LINKS_wb_m_i,

However sometimes one may use signals defined from the slave point of view:
LINKS_wb_s_o, LINKS_wb_s_i...

The problem appears if those two conventions meet in a single block. That happened to me, and resulted in a difficult to spot error. I had two signals - one connected to the master, and another to the slave. The synthesis tool didn't complain, but the design didn't work.

Therefore I suggest to either use only the signals named from the master perspective, or (maybe better) use suffixes describing the direction: LINKS_wb_m2s, LINKS_wb_s2m.