From 18b8fa7a27cff0847c8f3ba0b37650df741f6388 Mon Sep 17 00:00:00 2001 From: Xiang Xiao Date: Fri, 5 Apr 2024 22:59:46 +0800 Subject: [PATCH] arch: Rename g_cpu_intstack_top to g_intstacktop and g_intstack_alloc to g_intstackalloc for naming consistency. Signed-off-by: Xiang Xiao --- arch/arm/src/cxd56xx/cxd56_irq.c | 20 ++++++++-------- arch/arm/src/goldfish/chip.h | 4 ++-- arch/arm/src/goldfish/goldfish_irq.c | 28 +++++++++++------------ arch/arm/src/imx6/chip.h | 4 ++-- arch/arm/src/imx6/imx_irq.c | 28 +++++++++++------------ arch/arm/src/lc823450/lc823450_irq.c | 12 +++++----- arch/arm/src/qemu/chip.h | 4 ++-- arch/arm/src/qemu/qemu_irq.c | 28 +++++++++++------------ arch/arm/src/rp2040/rp2040_irq.c | 12 +++++----- arch/sparc/src/s698pm/s698pm-irq.c | 20 ++++++++-------- arch/sparc/src/s698pm/s698pm_exceptions.S | 6 ++--- arch/xtensa/src/esp32/chip_macros.h | 4 ++-- arch/xtensa/src/esp32/esp32_irq.c | 6 ++--- arch/xtensa/src/esp32s3/chip_macros.h | 4 ++-- arch/xtensa/src/esp32s3/esp32s3_irq.c | 6 ++--- 15 files changed, 93 insertions(+), 93 deletions(-) diff --git a/arch/arm/src/cxd56xx/cxd56_irq.c b/arch/arm/src/cxd56xx/cxd56_irq.c index dd91915844da1..c65569d8884ea 100644 --- a/arch/arm/src/cxd56xx/cxd56_irq.c +++ b/arch/arm/src/cxd56xx/cxd56_irq.c @@ -73,23 +73,23 @@ extern void up_send_irqreq(int idx, int irq, int cpu); * These definitions provide the aligned stack allocations. */ -static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3]; /* These definitions provide the "top" of the push-down stacks. */ -const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = +const uint32_t g_intstacktop[CONFIG_SMP_NCPUS] = { - (uint32_t)g_intstack_alloc + INTSTACK_SIZE, + (uint32_t)g_intstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uint32_t)g_intstack_alloc + (2 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (2 * INTSTACK_SIZE), #if CONFIG_SMP_NCPUS > 2 - (uint32_t)g_intstack_alloc + (3 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (3 * INTSTACK_SIZE), #if CONFIG_SMP_NCPUS > 3 - (uint32_t)g_intstack_alloc + (4 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (4 * INTSTACK_SIZE), #if CONFIG_SMP_NCPUS > 4 - (uint32_t)g_intstack_alloc + (5 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (5 * INTSTACK_SIZE), #if CONFIG_SMP_NCPUS > 5 - (uint32_t)g_intstack_alloc + (6 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (6 * INTSTACK_SIZE), #endif /* CONFIG_SMP_NCPUS > 5 */ #endif /* CONFIG_SMP_NCPUS > 4 */ #endif /* CONFIG_SMP_NCPUS > 3 */ @@ -584,7 +584,7 @@ int up_prioritize_irq(int irq, int priority) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_top(int cpu) { - return g_cpu_intstack_top[cpu]; + return g_intstacktop[cpu]; } #endif @@ -600,6 +600,6 @@ uintptr_t arm_intstack_top(int cpu) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_alloc(int cpu) { - return g_cpu_intstack_top[cpu] - INTSTACK_SIZE; + return g_intstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/arm/src/goldfish/chip.h b/arch/arm/src/goldfish/chip.h index 5dee28a9bf919..5f641005d1124 100644 --- a/arch/arm/src/goldfish/chip.h +++ b/arch/arm/src/goldfish/chip.h @@ -87,7 +87,7 @@ .macro setirqstack, tmp1, tmp2 mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ - ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */ + ldr \tmp2, =g_irqstacktop /* tmp2=Array of IRQ stack pointers */ lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ @@ -107,7 +107,7 @@ .macro setfiqstack, tmp1, tmp2 mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ - ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */ + ldr \tmp2, =g_fiqstacktop /* tmp2=Array of FIQ stack pointers */ lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ diff --git a/arch/arm/src/goldfish/goldfish_irq.c b/arch/arm/src/goldfish/goldfish_irq.c index b47166b80b4a6..c70a39e51f8b5 100644 --- a/arch/arm/src/goldfish/goldfish_irq.c +++ b/arch/arm/src/goldfish/goldfish_irq.c @@ -46,36 +46,36 @@ * These definitions provide the aligned stack allocations. */ -static uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3]; -static uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_irqstackalloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_fiqstackalloc[INTSTACK_ALLOC >> 3]; /* These are arrays that point to the top of each interrupt stack */ -uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_irqstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_irqstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_irqstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE), + (uintptr_t)g_irqstackalloc + (2 * INTSTACK_SIZE), #endif #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE), + (uintptr_t)g_irqstackalloc + (3 * INTSTACK_SIZE), #endif #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE) + (uintptr_t)g_irqstackalloc + (4 * INTSTACK_SIZE) #endif }; -uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_fiqstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + 2 * INTSTACK_SIZE, #endif #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + 3 * INTSTACK_SIZE, #endif #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE + (uintptr_t)g_fiqstackalloc + 4 * INTSTACK_SIZE #endif }; @@ -138,7 +138,7 @@ void up_irqinitialize(void) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_top(int cpu) { - return g_irqstack_top[cpu]; + return g_irqstacktop[cpu]; } #endif @@ -155,6 +155,6 @@ uintptr_t arm_intstack_top(int cpu) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_alloc(int cpu) { - return g_irqstack_top[cpu] - INTSTACK_SIZE; + return g_irqstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/arm/src/imx6/chip.h b/arch/arm/src/imx6/chip.h index 4c4ae15e53c30..394098f8f4a1a 100644 --- a/arch/arm/src/imx6/chip.h +++ b/arch/arm/src/imx6/chip.h @@ -85,7 +85,7 @@ .macro setirqstack, tmp1, tmp2 mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ - ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */ + ldr \tmp2, =g_irqstacktop /* tmp2=Array of IRQ stack pointers */ lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ @@ -105,7 +105,7 @@ .macro setfiqstack, tmp1, tmp2 mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ - ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */ + ldr \tmp2, =g_fiqstacktop /* tmp2=Array of FIQ stack pointers */ lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ diff --git a/arch/arm/src/imx6/imx_irq.c b/arch/arm/src/imx6/imx_irq.c index 7bac970709972..e2720f4c5bc96 100644 --- a/arch/arm/src/imx6/imx_irq.c +++ b/arch/arm/src/imx6/imx_irq.c @@ -49,36 +49,36 @@ * These definitions provide the aligned stack allocations. */ -uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3]; -uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3]; +uint64_t g_irqstackalloc[INTSTACK_ALLOC >> 3]; +uint64_t g_fiqstackalloc[INTSTACK_ALLOC >> 3]; /* These are arrays that point to the top of each interrupt stack */ -uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_irqstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_irqstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_irqstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE), + (uintptr_t)g_irqstackalloc + (2 * INTSTACK_SIZE), #endif #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE), + (uintptr_t)g_irqstackalloc + (3 * INTSTACK_SIZE), #endif #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE) + (uintptr_t)g_irqstackalloc + (4 * INTSTACK_SIZE) #endif }; -uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_fiqstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + 2 * INTSTACK_SIZE, #endif #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + 3 * INTSTACK_SIZE, #endif #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE + (uintptr_t)g_fiqstackalloc + 4 * INTSTACK_SIZE #endif }; @@ -163,7 +163,7 @@ void up_irqinitialize(void) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_top(int cpu) { - return g_irqstack_top[cpu]; + return g_irqstacktop[cpu]; } #endif @@ -179,6 +179,6 @@ uintptr_t arm_intstack_top(int cpu) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_alloc(int cpu) { - return g_irqstack_top[cpu] - INTSTACK_SIZE; + return g_irqstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/arm/src/lc823450/lc823450_irq.c b/arch/arm/src/lc823450/lc823450_irq.c index 92d14a90f4577..d9d11d6631f00 100644 --- a/arch/arm/src/lc823450/lc823450_irq.c +++ b/arch/arm/src/lc823450/lc823450_irq.c @@ -78,15 +78,15 @@ * These definitions provide the aligned stack allocations. */ -uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3]; +uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3]; /* These definitions provide the "top" of the push-down stacks. */ -const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = +const uint32_t g_intstacktop[CONFIG_SMP_NCPUS] = { - (uint32_t)g_intstack_alloc + INTSTACK_SIZE, + (uint32_t)g_intstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uint32_t)g_intstack_alloc + (2 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (2 * INTSTACK_SIZE), #endif /* CONFIG_SMP_NCPUS > 1 */ }; #endif @@ -831,7 +831,7 @@ int lc823450_irq_register(int irq, struct lc823450_irq_ops *ops) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_top(int cpu) { - return g_cpu_intstack_top[cpu]; + return g_intstacktop[cpu]; } #endif @@ -847,6 +847,6 @@ uintptr_t arm_intstack_top(int cpu) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_alloc(int cpu) { - return g_cpu_intstack_top[cpu] - INTSTACK_SIZE; + return g_intstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/arm/src/qemu/chip.h b/arch/arm/src/qemu/chip.h index ab2ccc38fa9c1..bf6655703446e 100644 --- a/arch/arm/src/qemu/chip.h +++ b/arch/arm/src/qemu/chip.h @@ -87,7 +87,7 @@ .macro setirqstack, tmp1, tmp2 mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ - ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */ + ldr \tmp2, =g_irqstacktop /* tmp2=Array of IRQ stack pointers */ lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ @@ -107,7 +107,7 @@ .macro setfiqstack, tmp1, tmp2 mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */ and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */ - ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */ + ldr \tmp2, =g_fiqstacktop /* tmp2=Array of FIQ stack pointers */ lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */ add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */ ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */ diff --git a/arch/arm/src/qemu/qemu_irq.c b/arch/arm/src/qemu/qemu_irq.c index a544f0ad46079..c94aed86ebb86 100644 --- a/arch/arm/src/qemu/qemu_irq.c +++ b/arch/arm/src/qemu/qemu_irq.c @@ -46,36 +46,36 @@ * These definitions provide the aligned stack allocations. */ -static uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3]; -static uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_irqstackalloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_fiqstackalloc[INTSTACK_ALLOC >> 3]; /* These are arrays that point to the top of each interrupt stack */ -uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_irqstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_irqstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_irqstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE), + (uintptr_t)g_irqstackalloc + (2 * INTSTACK_SIZE), #endif #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE), + (uintptr_t)g_irqstackalloc + (3 * INTSTACK_SIZE), #endif #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE) + (uintptr_t)g_irqstackalloc + (4 * INTSTACK_SIZE) #endif }; -uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_fiqstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + 2 * INTSTACK_SIZE, #endif #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE, + (uintptr_t)g_fiqstackalloc + 3 * INTSTACK_SIZE, #endif #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE + (uintptr_t)g_fiqstackalloc + 4 * INTSTACK_SIZE #endif }; @@ -138,7 +138,7 @@ void up_irqinitialize(void) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_top(int cpu) { - return g_irqstack_top[cpu]; + return g_irqstacktop[cpu]; } #endif @@ -154,6 +154,6 @@ uintptr_t arm_intstack_top(int cpu) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_alloc(int cpu) { - return g_irqstack_top[cpu] - INTSTACK_SIZE; + return g_irqstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/arm/src/rp2040/rp2040_irq.c b/arch/arm/src/rp2040/rp2040_irq.c index a6d8013416fb1..a780a0b3da6bd 100644 --- a/arch/arm/src/rp2040/rp2040_irq.c +++ b/arch/arm/src/rp2040/rp2040_irq.c @@ -63,15 +63,15 @@ extern void rp2040_send_irqreq(int irqreq); * These definitions provide the aligned stack allocations. */ -static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3]; /* These definitions provide the "top" of the push-down stacks. */ -const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = +const uint32_t g_intstacktop[CONFIG_SMP_NCPUS] = { - (uint32_t)g_intstack_alloc + INTSTACK_SIZE, + (uint32_t)g_intstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 - (uint32_t)g_intstack_alloc + (2 * INTSTACK_SIZE), + (uint32_t)g_intstackalloc + (2 * INTSTACK_SIZE), #endif /* CONFIG_SMP_NCPUS > 1 */ }; #endif /* defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 */ @@ -449,7 +449,7 @@ int up_prioritize_irq(int irq, int priority) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_top(int cpu) { - return g_cpu_intstack_top[cpu]; + return g_intstacktop[cpu]; } #endif @@ -465,6 +465,6 @@ uintptr_t arm_intstack_top(int cpu) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 uintptr_t arm_intstack_alloc(int cpu) { - return g_cpu_intstack_top[cpu] - INTSTACK_SIZE; + return g_intstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/sparc/src/s698pm/s698pm-irq.c b/arch/sparc/src/s698pm/s698pm-irq.c index 8237623ef373e..3de9ebd10d130 100644 --- a/arch/sparc/src/s698pm/s698pm-irq.c +++ b/arch/sparc/src/s698pm/s698pm-irq.c @@ -74,21 +74,21 @@ static volatile uint8_t g_irqmap[NR_IRQS]; * These definitions provide the aligned stack allocations. */ -static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3]; +static uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3]; /* These definitions provide the "top" of the push-down stacks. */ -uintptr_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_intstacktop[CONFIG_SMP_NCPUS] = { - (uintptr_t)g_intstack_alloc + INTSTACK_SIZE, + (uintptr_t)g_intstackalloc + INTSTACK_SIZE, #if defined(CONFIG_SMP) #if CONFIG_SMP_NCPUS > 1 - (uintptr_t)g_intstack_alloc + (2 * INTSTACK_SIZE), + (uintptr_t)g_intstackalloc + (2 * INTSTACK_SIZE), #if CONFIG_SMP_NCPUS > 2 - (uintptr_t)g_intstack_alloc + (3 * INTSTACK_SIZE), + (uintptr_t)g_intstackalloc + (3 * INTSTACK_SIZE), #if CONFIG_SMP_NCPUS > 3 - (uintptr_t)g_intstack_alloc + (4 * INTSTACK_SIZE), + (uintptr_t)g_intstackalloc + (4 * INTSTACK_SIZE), #endif /* CONFIG_SMP_NCPUS > 3 */ #endif /* CONFIG_SMP_NCPUS > 2 */ #endif /* CONFIG_SMP_NCPUS > 1 */ @@ -511,9 +511,9 @@ int up_prioritize_irq(int irq, int priority) uintptr_t sparc_intstack_top(int cpu) { #if defined(CONFIG_SMP) - return g_cpu_intstack_top[cpu]; + return g_intstacktop[cpu]; #else - return g_cpu_intstack_top[0]; + return g_intstacktop[0]; #endif } #endif @@ -531,9 +531,9 @@ uintptr_t sparc_intstack_top(int cpu) uintptr_t sparc_intstack_alloc(int cpu) { #if defined(CONFIG_SMP) - return g_cpu_intstack_top[cpu] - INTSTACK_SIZE; + return g_intstacktop[cpu] - INTSTACK_SIZE; #else - return g_cpu_intstack_top[0] - INTSTACK_SIZE; + return g_intstacktop[0] - INTSTACK_SIZE; #endif } #endif diff --git a/arch/sparc/src/s698pm/s698pm_exceptions.S b/arch/sparc/src/s698pm/s698pm_exceptions.S index acc30c3335c4e..d1f9f36faeb0b 100644 --- a/arch/sparc/src/s698pm/s698pm_exceptions.S +++ b/arch/sparc/src/s698pm/s698pm_exceptions.S @@ -47,7 +47,7 @@ .global _ISR_Handler #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 - .global g_cpu_intstack_top + .global g_intstacktop #endif /* CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 7 */ .global sparc_doirq /* Dispatch an IRQ */ .align 8 @@ -173,8 +173,8 @@ save_isf: mov %g0, %g5 ! CPU ID = 0 #endif sll %g5, 2 , %g5 ! %g5 = CPUID * 4 - set g_cpu_intstack_top, %g4 ! %g4 = Array of stack pointers - add %g4, %g5, %g4 ! %g4 = g_cpu_intstack_top + CPUID * 4 + set g_intstacktop, %g4 ! %g4 = Array of stack pointers + add %g4, %g5, %g4 ! %g4 = g_intstacktop + CPUID * 4 ld [%g4], %g5 ! restore %sp sub %g5, CONTEXT_CONTROL_INTERRUPT_FRAME_SIZE, %sp diff --git a/arch/xtensa/src/esp32/chip_macros.h b/arch/xtensa/src/esp32/chip_macros.h index 2a68cedf45f70..ebeb0761dc337 100644 --- a/arch/xtensa/src/esp32/chip_macros.h +++ b/arch/xtensa/src/esp32/chip_macros.h @@ -87,7 +87,7 @@ #ifdef __ASSEMBLY__ #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 - .global g_cpu_intstack_top + .global g_intstacktop #endif /* CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 15 */ #endif /* __ASSEMBLY__ */ @@ -121,7 +121,7 @@ #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 .macro setintstack tmp1 tmp2 getcoreid \tmp1 /* tmp1 = Core ID (0 or 1) */ - movi \tmp2, g_cpu_intstack_top /* tmp2 = Array of stack pointers */ + movi \tmp2, g_intstacktop /* tmp2 = Array of stack pointers */ addx4 \tmp2, \tmp1, \tmp2 /* tmp2 = tmp2 + (tmp1 << 2) */ l32i a1, \tmp2, 0 /* a1 = *tmp2 */ .endm diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c index 1f1ca44dfbcc1..c0b69773db988 100644 --- a/arch/xtensa/src/esp32/esp32_irq.c +++ b/arch/xtensa/src/esp32/esp32_irq.c @@ -127,7 +127,7 @@ static uint32_t g_intstackalloc[INTSTACK_ALLOC >> 2]; /* These definitions provide the "top" of the push-down stacks. */ -uintptr_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_intstacktop[CONFIG_SMP_NCPUS] = { (uintptr_t)g_intstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 @@ -751,7 +751,7 @@ void up_enable_irq(int irq) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 uintptr_t xtensa_intstack_top(int cpu) { - return g_cpu_intstack_top[cpu]; + return g_intstacktop[cpu]; } /**************************************************************************** @@ -765,7 +765,7 @@ uintptr_t xtensa_intstack_top(int cpu) uintptr_t xtensa_intstack_alloc(int cpu) { - return g_cpu_intstack_top[cpu] - INTSTACK_SIZE; + return g_intstacktop[cpu] - INTSTACK_SIZE; } #endif diff --git a/arch/xtensa/src/esp32s3/chip_macros.h b/arch/xtensa/src/esp32s3/chip_macros.h index 658789489f58f..d1ecc8fd5a021 100644 --- a/arch/xtensa/src/esp32s3/chip_macros.h +++ b/arch/xtensa/src/esp32s3/chip_macros.h @@ -71,7 +71,7 @@ #ifdef __ASSEMBLY__ #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 - .global g_cpu_intstack_top + .global g_intstacktop #endif /* CONFIG_SMP && CONFIG_ARCH_INTERRUPTSTACK > 15 */ #endif /* __ASSEMBLY__ */ @@ -105,7 +105,7 @@ #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 .macro setintstack tmp1 tmp2 getcoreid \tmp1 /* tmp1 = Core ID (0 or 1) */ - movi \tmp2, g_cpu_intstack_top /* tmp2 = Array of stack pointers */ + movi \tmp2, g_intstacktop /* tmp2 = Array of stack pointers */ addx4 \tmp2, \tmp1, \tmp2 /* tmp2 = tmp2 + (tmp1 << 2) */ l32i a1, \tmp2, 0 /* a1 = *tmp2 */ .endm diff --git a/arch/xtensa/src/esp32s3/esp32s3_irq.c b/arch/xtensa/src/esp32s3/esp32s3_irq.c index be67a792e2079..9d46dda22babe 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_irq.c +++ b/arch/xtensa/src/esp32s3/esp32s3_irq.c @@ -135,7 +135,7 @@ static uint32_t g_intstackalloc[INTSTACK_ALLOC >> 2]; /* These definitions provide the "top" of the push-down stacks. */ -uintptr_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = +uintptr_t g_intstacktop[CONFIG_SMP_NCPUS] = { (uintptr_t)g_intstackalloc + INTSTACK_SIZE, #if CONFIG_SMP_NCPUS > 1 @@ -698,7 +698,7 @@ void up_enable_irq(int irq) #if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 uintptr_t xtensa_intstack_top(int cpu) { - return g_cpu_intstack_top[cpu]; + return g_intstacktop[cpu]; } /**************************************************************************** @@ -712,7 +712,7 @@ uintptr_t xtensa_intstack_top(int cpu) uintptr_t xtensa_intstack_alloc(int cpu) { - return g_cpu_intstack_top[cpu] - INTSTACK_SIZE; + return g_intstacktop[cpu] - INTSTACK_SIZE; } #endif