Write verilog::generate() output to a file

[Uzaaft]

Right now, the only way(which I found, I might be wrong) to generate verilog code is to print the verilog code to the console, and copy it from there. Is there a way to write the output to a file, similarly to how sim::generate() works, already existing in the crate? Or could this be implemented into the crate?

Anyways, great work! I've began to use your crate recently(today xD), and it's a tremendous productivity booster!

[yupferris]

Hi! I'm not really sure why it wouldn't work to output to a file? verilog::generate accepts an instance of std::io::Write just like sim::generate does, so it should be no different. Perhaps you're thinking that because it takes the Write instance by value that it always takes ownership? In that case, bear in mind that there's a Write impl for &mut Write, so you can pass in a mutable reference multiple times if you want to output multiple modules.

Also, glad you're enjoying using it! One thing to keep in mind is that I'm currently pretty deep in changing how module hierarchies will work (see #23), so there will be some pretty big breaking changes soon (the library is pre-1.0 so this has to be expected!). These should make user code/managing generated code a lot more straightforward/readable imo, though, so it should be positive.

[Uzaaft]

Ah, my bad. I understand. I seemed to have made the solution/my code more complicated than it should be. Thanks for the help! And appreciate the heads up!

[Uzaaft]

This pretty much sums up my approach.